CP3UB26Y98NEPX National Semiconductor, CP3UB26Y98NEPX Datasheet - Page 35

• Manufacturer Part Number: CP3UB26Y98NEPX
• Manufacturer: National Semiconductor

Specifications of CP3UB26Y98NEPX

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Not Compliant

RDPROT
WRPROT
8.5
There is a separate interface for the program flash and data
flash memories. The same set of registers exist in both in-
terfaces. In most cases they are independent of each other,
but in some cases the program flash interface controls the
interface for both memories, as indicated in the following
sections. Table 16 lists the registers.
Not Empty
Not Empty
Not Empty
EMPTY
Empty
Empty
Empty
FLASH MEMORY INTERFACE
REGISTERS
Table 15 CPU Reset Behavior
The RDPROT field controls the global read
protection mechanism for the on-chip flash
program memory. If a majority of the three
RDPROT bits are clear, the flash program
memory is protected against read access
from the serial debug interface or an external
flash programmer. CPU read access is not af-
fected by the RDPROT bits. If a majority of the
RDPROT bits are set, read access is allowed.
The WRPROT field controls the global write
protection mechanism for the on-chip flash
program memory. If a majority of the three
WRPROT bits are clear, the flash program
memory is protected against write access
from any source and read access from the se-
rial debug interface. If a majority of the WR-
PROT bits are set, write access is allowed.
No ISP
No ISP
ISPE
ISP
ISP
ISP
ISP
Boot Area
Don’t Care
Don’t Care
Defined
Defined
Defined
Defined
Not
Not
Start-Up Operation
Device starts in IRE/
Device starts in IRE/
Device starts in IRE/
Device starts in ISP
Device starts in ISP
mode and is kept in
Area start address
mode from Code
ERE mode from
Code Area start
ERE mode from
Code Area start
ERE mode from
its reset state
address 0
address
address
35
FMMERASE0
FMPERASE
FMSTART
FF F94Ch
FF F94Eh
FF F95Ah
FF F95Eh
FF F940h
FF F942h
FM0WER
FF F944h
FM1WER
FF F946h
FF F950h
FF F952h
FF F954h
FMPROG
FF F956h
FF F958h
FMMEND
FF F960h
FF F962h
FF F964h
FF F966h
FF F968h
FMTRAN
Program
FMCTRL
Memory
FMIBAR
FMIBDR
FMSTAT
FMPSR
FMEND
FMRCV
FMAR0
FMAR1
FMAR2
Table 16 Flash Memory Interface Registers
FSMMERASE0
FSMPERASE
FSMSTART
FSMPROG
FSMMEND
FSM0WER
FSMTRAN
FSMCTRL
FSMIBDR
FF F74Ch
FSMIBAR
FSMSTAT
FF F74Eh
FF F75Ah
FF F75Eh
FF F740h
FF F742h
FF F744h
FF F750h
FF F752h
FF F754h
FF F756h
FF F758h
FF F760h
FF F762h
FF F764h
FF F766h
FF F768h
FSMPSR
FSMEND
FSMRCV
FSMAR0
FSMAR1
FSMAR2
Memory
Data
N/A
Flash Memory Module
Flash Memory Module
Write Enable Register
Write Enable Register
Time Reload Register
Time Reload Register
Auto-Read Register 0
Auto-Read Register 1
Auto-Read Register 2
Flash Memory Page
Flash Memory Start
Programming Time
Erase Time Reload
Erase Time Reload
Flash Memory End
Prescaler Register
Information Block
Information Block
Address Register
Address Register
Flash Memory 0
Flash Memory 1
Control Register
Reload Register
Reload Register
Erase End Time
Reload Register
Reload Register
Status Register
Transition Time
Recovery Time
Flash Memory
Flash Memory
Flash Memory
Flash Memory
Flash Memory
Flash Memory
Flash Memory
Flash Memory
Flash Memory
Flash Memory
Flash Memory
Description
Register 0
Register
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