ISP1183BS STEricsson, ISP1183BS Datasheet - Page 22

• Manufacturer Part Number: ISP1183BS
• Manufacturer: STEricsson

Specifications of ISP1183BS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

11. Suspend and resume
ISP1183_3
Product data sheet
11.1 Suspend conditions
The ISP1183 detects a USB suspend status when a constant idle state is present on the
USB bus for more than 3 ms.
The bus-powered devices that are suspended must not consume more than 500 μA of
current. This is achieved by shutting down power to system components or supplying
them with a reduced voltage.
The steps leading up to the suspend status are:
Figure 11
1. On detecting a wake-up-to-suspend transition, the ISP1183 sets bit SUSPND in the
2. When firmware detects a suspend condition, it must prepare all system components
3. In the interrupt service routine, firmware must check the current status of the USB
4. To meet suspend current requirements for a bus-powered device, internal clocks must
5. When firmware has set and cleared bit GOSUSP in the Mode register, the ISP1183
Interrupt register. This will generate an interrupt if bit IESUSP in the Interrupt Enable
register is set.
for the suspend state:
a. All signals connected to the ISP1183 must enter appropriate states to meet the
b. All input pins of the ISP1183 must have a CMOS LOW or HIGH level.
bus. When bit BUSTATUS in the Interrupt register is logic 0, the USB bus has left
suspend mode and the process must be aborted. Otherwise, the next step can be
executed.
be switched off by clearing bit CLKRUN in the Hardware Configuration register.
enters the suspend state. In powered-off application, the ISP1183 asserts output
SUSPEND and switches off internal clocks after 2 ms.
power consumption requirements of the suspend state.
shows a typical timing diagram.
Rev. 03 — 20 January 2009
Low-power USB Peripheral Controller with DMA
© ST-NXP Wireless 2009. All rights reserved.
ISP1183
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