PSD834F2-15J STMicroelectronics, PSD834F2-15J Datasheet - Page 62

• Manufacturer Part Number: PSD834F2-15J
• Manufacturer: STMicroelectronics

Specifications of PSD834F2-15J

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Package Type: PLCC
• Mounting: Surface Mount
• Pin Count: 52
• Lead Free Status / RoHS Status: Compliant

PSD834F2V
Table 32. Status During Power-On Reset, Warm Reset and Power-down Mode
Note: 1. The SR_cod and PeriphMode Bits in the VM Register are always cleared to 0 on Power-On Reset or Warm Reset.
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MCU I/O
PLD Output
Address Out
Data Port
Peripheral I/O
PMMR0 and PMMR2
Macrocells flip-flop status
VM Register
All other registers
Port Configuration
Register
1
Valid after internal PSD
configuration bits are
loaded
Tri-stated
Tri-stated
Cleared to 0 by internal
Power-On Reset
Initialized, based on the
selection in PSDsoft
Configuration menu
Cleared to 0
Input mode
Tri-stated
Cleared to 0
Power-On Reset
Power-On Reset
Valid
Tri-stated
Depends on .re and .pr
equations
Initialized, based on the
selection in PSDsoft
Configuration menu
Input mode
Tri-stated
Tri-stated
Unchanged
Cleared to 0
Warm Reset
Warm Reset
Unchanged
Depends on inputs to PLD
(addresses are blocked in
PD mode)
Not defined
Tri-stated
Tri-stated
Unchanged
Depends on .re and .pr
equations
Unchanged
Unchanged
Power-down Mode
Power-down Mode