S71PL129JB0BFW9Z0 Spansion Inc., S71PL129JB0BFW9Z0 Datasheet - Page 56

• Manufacturer Part Number: S71PL129JB0BFW9Z0
• Manufacturer: Spansion Inc.

Specifications of S71PL129JB0BFW9Z0

• Operating Supply Voltage (max): 3.1V
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Legend:
BA = Address of bank switching to autoselect mode, bypass mode, or erase operation. Determined by Amax:A19.
PA = Program Address (Amax:A0). Addresses latch on falling edge of WE# or CE1#/CE2# pulse, whichever happens
later.
PD = Program Data (DQ15:DQ0) written to location PA. Data latches on rising edge of WE# or CE1#/CE2# pulse,
whichever happens first.
RA = Read Address (Amax:A0).
RD = Read Data (DQ15:DQ0) from location RA.
SA = Sector Address (Amax:A12) for verifying (in autoselect mode) or erasing.
WD = Write Data. See “Configuration Register” definition for specific write data. Data latched on rising edge of WE#.
X = Don’t care
Notes:
1. See
2. All values are in hexadecimal.
3. Shaded cells in table denote read cycles. All other cycles are write operations.
54
Command (Notes)
Read
Reset
Autoselect
(Note
Program
Chip Erase
Sector Erase
Program/Erase Suspend
Program/Erase Resume
CFI Query
Accelerated Program
Unlock Bypass Entry
Unlock Bypass Program
Unlock Bypass Erase
Unlock Bypass CFI (Notes 13, 15)
Unlock Bypass Reset
(Note
(Note
7)
Table 1
Command
Command Definitions Tables
(Note
5)
6)
Manufacturer ID
Device ID
Secured Silicon Sector
Factory Protect
8)
Sector Group Protect
Verify
for description of bus operations.
13)
DYB to a 1 protects the sector from programs or erases. Since this is a volatile
bit, removing power or resetting the device will clear the DYBs. The bank address
is latched when the command is written.
be verified by writing a Sector Protection Status command to the device.
Note that there is no single command to independently verify the programming
of a DYB for a given sector group.
The programming of either the PPB or DYB for a given sector or sector group can
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
9)
15)
15)
15)
15)
(Note
12)
15)
10)
11)
1
1
4
6
4
4
4
6
6
1
1
1
2
3
2
2
1
2
Table 12. Memory Array Command Definitions
Addr
XXX
XXX
555
555
555
555
555
555
555
555
RA
BA
BA
XX
XX
XX
XX
55
S71PL129JC0/S71PL129JB0/S71PL129JA0
Data
AAA
RD
AA
AA
AA
AA
AA
AA
AA
F0
B0
30
98
A0
A0
80
98
90
A d v a n c e
Addr
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
XXX
PA
PA
XX
Data
PD
PD
55
55
55
55
55
55
55
55
10
00
Addr
(BA)
(BA)
(BA)
(BA)
555
555
555
555
555
555
555
555
I n f o r m a t i o n
Bus Cycles (Notes 1–4)
Data
90
90
90
90
A0
80
80
20
Addr
(BA)
(BA)
(SA)
X00
X01
X03
X02
555
555
PA
XX00/
(Note
Data
XX01
227E
01
PD
AA
AA
8)
Addr
(BA)
2AA
2AA
X0E
S71PL129Jxx_00_A8 October 28, 2005
(Note
Data
10)
55
55
Addr
(BA)
X0F
555
SA
(Note
Data
10)
10
30