S71PL129JB0BFW9Z0 Spansion Inc., S71PL129JB0BFW9Z0 Datasheet - Page 20
S71PL129JB0BFW9Z0
Manufacturer Part Number
S71PL129JB0BFW9Z0
Description
Manufacturer
Spansion Inc.
Datasheet
1.S71PL129JB0BFW9Z0.pdf
(153 pages)
Specifications of S71PL129JB0BFW9Z0
Operating Supply Voltage (max)
3.1V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Pin Description
Logic Symbol
18
Amax–A0
DQ15–DQ0
CE#
OE#
WE#
V
NC
RY/BY#
WP#/ACC
V
V
RESET#
CE1#, CE2#
Notes:
1.
SS
IO
CC
Amax = A21
max+1
=
=
=
=
=
=
=
=
=
=
=
=
=
S71PL129JC0/S71PL129JB0/S71PL129JA0
CE#
OE#
Amax–A0
WE#
WP#/ACC
RESET#
V
A d v a n c e
Address bus
16-bit data inputs/outputs/float
Chip Enable Inputs
Output Enable Input
Write Enable
Device Ground
Pin Not Connected Internally
Ready/Busy output and open drain.
When RY/BY#= V
read operations and commands. When RY/BY#=
V
algorithm or the device is executing a hardware
reset operation.
Write Protect/Acceleration Input.
When WP#/ACC= V
4K-word sectors are write protected regardless of
other sector protection configurations. When WP#/
ACC= V
DYB or PPB is programmed. When WP#/ACC= 12V,
program and erase operations are accelerated.
Input/Output Buffer Power Supply 2.7 V to 3.6 V
Chip Power Supply
(2.7 V to 3.6 V or 2.7 to 3.3 V)
Hardware Reset Pin
Chip Enable Inputs.
CE1# controls the 64Mb in Banks 1A and 1B. CE2#
controls the 64 Mb in Banks 2A and 2B.
IO
OL
(V
, the device is either executing an embedded
CCQ
)
IH
, these sector are unprotected unless the
DQ15–DQ0
RY/BY#
I n f o r m a t i o n
IH
, the device is ready to accept
IL
, the highest and lowest two
16
S71PL129Jxx_00_A8 October 28, 2005
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