S71PL129JB0BFW9Z0 Spansion Inc., S71PL129JB0BFW9Z0 Datasheet - Page 135

• Manufacturer Part Number: S71PL129JB0BFW9Z0
• Manufacturer: Spansion Inc.

Specifications of S71PL129JB0BFW9Z0

• Operating Supply Voltage (max): 3.1V
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Functional Description
Legend:L = V
Notes:
1.
2. Power Down mode can be entered from Standby state and all DQ pins are in High-Z state. Data retention depends on the
3. Can be either V
Power Down (for 32M, 64M Only)
October 28, 2005 S71PL129Jxx_00_A8
Standby (Deselect)
Output Disable (Note 1)
Output Disable (No Read)
Read (Upper Byte)
Read (Lower Byte)
Read (Word)
No Write
Write (Upper Byte)
Write (Lower Byte)
Write (Word)
Power Down
Sleep (default)
Should not be kept this logic condition longer than 1 ms. Please contact local Spansion representative for the relaxation of 1ms limitation.
selection of the Power-Down Program, 16M has data retention in all modes except Power Down. Refer to Power Down for
details.
4M Partial
8M Partial
Mode
Power Down
Power Down Program Sequence
Mode
IL
, H = V
The Power Down is a low-power idle state controlled by CE2. CE2 Low drives the device in power-
down mode and maintains the low-power idle state as long as CE2 is kept Low. CE2 High resumes
the device from power-down mode. These devices have three power-down modes. These can be
programmed by series of read/write operation. Each mode has following features.
The default state is Sleep and it is the lowest power consumption but all data is lost once CE2 is
brought to Low for Power Down. It is not required to program to Sleep mode after power-up.
The program requires 6 read/write operations with a unique address. Between each read/write
operation requires that device be in standby mode. The following table shows the detail sequence.
IL
or V
Retention Data
IH
4M bit
8M bit
IH
No
but must be valid before Read or Write.
, X can be either V
Cycle #
32M
A d v a n c e
2nd
1st
CE2#
H
H
L
CE1#
00000h to 3FFFFh
00000h to 7FFFFh
Retention Address
H
L
X
S71PL129JC0/S71PL129JB0/S71PL129JA0
Operation
Write
Read
N/A
I n f o r m a t i o n
WE#
IL
X
H
H
X
L
or V
IH
OE#
, High-Z = High Impedance.
X
H
H
X
L
3FFFFFh (MSB)
Sleep (default)
3FFFFFh
Address
16M Partial
8M Partial
LB#
H
H
H
H
X
X
L
L
L
L
X
Mode
UB#
X
X
H
H
H
H
X
L
L
L
L
Read Data (RDa)
Retention Data
Note 3
Valid
Valid
Valid
Valid
Valid
Valid
Valid
Valid
A
16M bit
Data
RDa
8M bit
21-0
X
X
No
64M
Output Valid
Output Valid
Input Valid
Input Valid
High-Z
High-Z
High-Z
High-Z
Invalid
Invalid
High-Z
DQ
00000h to 7FFFFh
00000h to FFFFFh
8-1
Retention Address
N/A
Output Valid
Output Valid
Input Valid
Input Valid
High-Z
High-Z
High-Z
High-Z
Invalid
Invalid
High-Z
DQ
16-9
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