S71PL129JB0BFW9Z0 Spansion Inc., S71PL129JB0BFW9Z0 Datasheet - Page 136

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S71PL129JB0BFW9Z0

Manufacturer Part Number
S71PL129JB0BFW9Z0
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of S71PL129JB0BFW9Z0

Operating Supply Voltage (max)
3.1V
Operating Temperature (max)
85C
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
134
Sleep (default)
4M Partial
8M Partial
Address Key
N/A
32M
The first cycle reads from the most significant address (MSB).
The second and third cycle are to write back the data (RDa) read by first cycle. If the second or
third cycle is written into the different address, the program is cancelled, and the data written by
the second or third cycle is valid as a normal write operation.
The fourth and fifth cycles write to MSB. The data from the fourth and fifth cycles is “don’t care.”
If the fourth or fifth cycles are written into different address, the program is also cancelled but
write data might not be written as normal write operation.
The last cycle is to read from specific address key for mode selection.
Once this program sequence is performed from a Partial mode to the other Partial mode, the writ-
ten data stored in memory cell array can be lost. So, it should perform this program prior to
regular read/write operation if Partial mode is used.
The address key has following format.
Mode
Sleep (default)
16M Partial
8M Partial
Cycle #
3rd
4th
5th
6th
64M
N/A
S71PL129JC0/S71PL129JB0/S71PL129JA0
Operation
Write
Write
Write
Read
A d v a n c e
A21
1
1
1
1
Address Key
3FFFFFh
3FFFFFh
3FFFFFh
Address
A20
I n f o r m a t i o n
1
1
0
0
Read Data (RDb)
Address
Don’t Care (X)
A19
1
0
1
0
Data
RDa
X
S71PL129Jxx_00_A8 October 28, 2005
A18 - A0
1
1
1
1
3FFFFFh
37FFFFh
2FFFFFh
27FFFFh
Binary

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