SAA7118EEB-T NXP Semiconductors, SAA7118EEB-T Datasheet - Page 13

• Manufacturer Part Number: SAA7118EEB-T
• Description: Video ICs COMPONENT VID DECODER W/COMB F
• Manufacturer: NXP Semiconductors
• Type: Multi-Standard Video Decoderr

Specifications of SAA7118EEB-T

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Maximum Operating Temperature: + 70 C
• Package / Case: SOT-700
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Not Compliant
• Other names: SAA7118E/V1,518

NXP Semiconductors
Table 4.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
SAA7118_7
Product data sheet
Symbol
TDI
V
V
XTALI
XTALO
V
XTOUT
DNC9
DNC10
SSD13
SS(xtal)
DD(xtal)
I = input, O = output, P = power, NC = not connected, st = strapping, pu = pull-up, pd = pull-down, od = open-drain.
Pin strapping is done by connecting the pin to the supply via a 3.3 k resistor. During the power-up reset sequence the corresponding
pins are switched to input mode to read the strapping level. For the default setting no strapping resistor is necessary (internal pull-down).
Pin RTCO operates as I
Pin ALRCLK = LOW for 24.576 MHz crystal (default); pin ALRCLK = HIGH for 32.110 MHz crystal.
In accordance with the “IEEE1149.1” standard the pads TDI, TMS, TCK and TRST are input pads with an internal pull-up transistor and
TDO is a 3-state output pad.
For board design without boundary scan implementation connect the TRST pin to ground.
This pin provides easy initialization of the Boundary Scan Test (BST) circuit. TRST can be used to force the Test Access Port (TAP)
controller to the TEST_LOGIC_RESET state (normal operation) at once.
Pin description
Pin
QFP160
152
153
154
155
156
157
158
159
160
2
C-bus slave address pin; RTCO = 0 slave address 42h/43h (default); RTCO = 1 slave address 40h/41h.
LBGA156
B5
D5
A4
B4
A3
B3
A2
C3
C4
…continued
Type
I/pu
P
P
I
O
P
O
NC
NC
[1]
Rev. 07 — 7 July 2008
Description
test data input for boundary scan test
digital ground 13 (peripheral cells)
ground for crystal oscillator
input terminal for 24.576 MHz (32.11 MHz) crystal oscillator or
connection of external oscillator with TTL compatible square wave
clock signal
24.576 MHz (32.11 MHz) crystal oscillator output; not connected if
TTL clock input of XTALI is used
supply voltage for crystal oscillator
crystal oscillator output signal; auxiliary signal
do not connect, reserved for future extensions and for testing
do not connect, reserved for future extensions and for testing
Multistandard video decoder with adaptive comb filter
[5]
SAA7118
© NXP B.V. 2008. All rights reserved.
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