SI3206-B-GQ Silicon Laboratories Inc, SI3206-B-GQ Datasheet - Page 109

• Manufacturer Part Number: SI3206-B-GQ
• Description: IC PROSLIC LINE FEED 125V 48TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: ProSLIC®r

Specifications of SI3206-B-GQ

• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Longitudinal Balanced: 63
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TQFP
• Loop Current Limit: 45mA
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Function: Subscriber Line Interface Concept (SLIC)
• Interface: GCI, PCM, SPI
• Number Of Circuits: 4
• Voltage - Supply: 3.3V
• Current - Supply: *
• Power (watts): *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad
• Includes: *
• Lead Free Status / RoHS Status: Compliant

RINGAMP: Ringing Amplitude (RAM Address 59)
Reset settings = 0x00
Reset settings = 0x00
RINGFRHI: Ringing Frequency High Byte (RAM Address 57)
RINGFRLO: Ringing Frequency Low Byte (RAM Address 58)
Reset settings = 0x00
15:0
14:0
15:3
Name
Name
Name
Type
Type
Type
Bit
Bit
Bit
Bit
Bit
Bit
RINGFRLO[15:3]
RINGFRHI[14:0]
RINGAMP[15:0]
D15
D15
D15
Name
Name
Name
D14
D14
D14
D13
D13
D13
Ringing Amplitude.
This RAM location programs the peak ringing amplitude. Refer to "4.6. Ringing Gen-
eration" on page 37 for use.
Ringing Frequency High Byte.
This RAM location programs the upper byte of the ringing frequency coefficient. The
RINGFRLO RAM location holds the lower byte. Refer to "4.6. Ringing Generation" on
page 37 for use.
Ringing Frequency Low Byte.
This RAM location programs the lower byte of the ringing frequency coefficient. The
RINGFRHI RAM location holds the upper byte. Refer to "4.6. Ringing Generation" on
page 37 for use.
D12
D12
D12
D11
D11
D11
D10
D10
D10
RINGFRLO[15:3]
Preliminary Rev. 0.96
R/W
R/W
D9
D9
D9
RINGAMP[15:0]
RINGFRHI[14:0]
D8
D8
D8
R/W
D7
D7
D7
Function
Function
Function
D6
D6
D6
D5
D5
D5
D4
D4
D4
D3
D3
D3
D2
D2
D2
Si3232
D1
D1
D1
D0
D0
D0
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