SI3206-B-GQ Silicon Laboratories Inc, SI3206-B-GQ Datasheet
SI3206-B-GQ
Specifications of SI3206-B-GQ
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SI3206-B-GQ Summary of contents
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... Cable telephony Wireless local loop Description The Si3232 is a low-voltage CMOS SLIC that offers a low-cost, fully software- programmable, dual-channel, analog telephone interface for customer premise (CPE) applications. Internal ringing generation eliminates centralized ringers and ringing relays, and on-chip subscriber loop testing allows remote line card and loop diagnostics with no external test equipment or relays ...
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Si3232 2 Preliminary Rev. 0.96 ...
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Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . ...
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... The specified performance requires that the exposed pad be soldered to an exposed copper surface of equal size and that multiple vias are added to enable heat transfer between the top-side copper surface and a large internal copper ground plane. Refer to “AN55: Dual ProSLIC™ User Guide” the Si3232 evaluation board data sheet for specific layout examples. ...
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Table 2. Recommended Operating Conditions Parameter Ambient Temperature Ambient Temperature Si3232 Supply Voltage Si3200 Supply Voltage High Battery Supply Voltage, Si3200 Low Battery Supply Voltage, Si3200 *Note: All minimum and maximum specifications are guaranteed and apply across the recommended operating ...
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Si3232 Table 3. Power Supply Characteristics = = ( –V 3 °C for K-Grade, – °C for B-Grade) DD DD1 DD4 A Parameter Symbol V –V I –I DD1 DD4 VDD1 ...
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Table 3. Power Supply Characteristics = = ( –V 3 °C for K-Grade, – °C for B-Grade) DD DD1 DD4 A Parameter Symbol Power Consumption P SLEEP P OPEN P STBY ...
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... The level of any unwanted tones within the bandwidth kHz will not exceed –55 dBm. 5. The OBIAS and ABIAS registers program the dc bias current through the SLIC in the on-hook transmission and off- hook active conditions, respectively. This per-pin total current setting should be selected such that it can accommodate the sum of the metallic and longitudinal currents through each of the TIP and RING leads for a given application ...
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... The level of any unwanted tones within the bandwidth kHz will not exceed –55 dBm. 5. The OBIAS and ABIAS registers program the dc bias current through the SLIC in the on-hook transmission and off- hook active conditions, respectively. This per-pin total current setting should be selected such that it can accommodate the sum of the metallic and longitudinal currents through each of the TIP and RING leads for a given application ...
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Si3232 Table 5. Linefeed Characteristics = ( –V 3. DD1 DD4 A Parameter Symbol DC Loop Current Accuracy DC Open Circuit Voltage Accuracy DC Differential Output R Resistance DC On-Hook Voltage V OHTO ...
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Table 6. Monitor ADC Characteristics = = ( –V 3. DD1 DD4 A Parameter Symbol Resolution Differential Nonlinearity DNL Integral Nonlinearity INL Gain Error Table 7. Si3200 Characteristics = = (V 3.13 to ...
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Si3232 Table 8. DC Characteristics – DD1 DD4 A Parameter Symbol High Level Input V IH Voltage Low Level Input Voltage V IL High Level Output V OH ...
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Table 10. Switching Characteristics—SPI = = ( –V 3. DD1 DD4 A Parameter Cycle Time SCLK Rise Time, SCLK Fall Time, SCLK Delay Time, SCLK Fall to SDO Transition Delay Time, CS Rise ...
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Si3232 Table 11. Switching Characteristics—PCLK and FSYNC Timing = ( –V 3. DD1 DD4 A Parameter PCLK Period Valid PCLK Inputs 2 FSYNC Period PCLK Duty Cycle Tolerance PCLK Period Jitter Tolerance Rise ...
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Figure 3. Si3232 Simplified Audio Path Block Diagram Fundamental 5 Output Power (dBm0 2 Fundamental Input Power (dBm0) Figure 4. Overload Compression Performance Preliminary Rev. 0.96 Acceptable ...
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... C45 150 pF VTXP BCM3341 C46 150 pF VTXN C47 150 pF CMlevel SPI Port Figure 5. Typical Connection Diagram between Si3232 and Broadcom® BCM3341 (One SLIC channel shown: Channel “a”) 16 VRXPa SRINGDCa VRXNa SRINGACa STIPDCa SRINGDACa R40 VTXPa 20 kΩ ITIPPa R41 ...
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Typical Application Schematic 1 1 VTXN VTXP BATSELa VTXNb 49 32 VTXNa VTXPb 50 31 VTXPa VRXNb 51 30 VRXNa VRXPb 52 29 VRXPa VCM 53 28 THERMa THERMb 54 27 IRINGPa IRINGPb 55 26 GND1 GND2 56 25 ...
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... Function Filter capacitors for TIP, RING ac-sensing inputs. TIP/RING compensation capacitors. Low-pass filter capacitor to stabilize differential and common mode SLIC feedback loops. Decoupling for analog and digital chip supply pins. Decoupling for battery voltage supply pins. Reconstruction filter for DAC of BCM3341. ...
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... Functional Description The Si3232 dual SLIC is a low-voltage CMOS device that provides a fully-programmable SLIC with line monitoring and test functions to create a dual-channel analog telephone interface. Intended for multiple channel applications, the Si3232 integration and low-power operation for applications, such as integrated access devices (IADs), voice-over DSL systems, cable telephony systems, and voice-over IP systems ...
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... I , and is programmable from LIM 0.87 mA steps. The Si3232 exhibits a characteristic dc impedance of 320 Ω during Active mode. 20 Monitor A/D A/D A/D DSP D/A D/A SLIC DAC Σ SLIC Control Loop Si3200 Battery Current Select Mirror Control The TIP-RING voltage, V programmable voltage, V ...
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... BATH LIM – OC,MAX These conditions apply when the dc-sensing inputs, and STIPDCa/b and SRINGDCa/b, are placed on the SLIC OV side of any protection resistance placed in series with the TIP and RING leads. If line-side sensing is desired, both V and V OV equal to R PROT protection resistor. Other safety precautions may apply. See " ...
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Si3232 4.3.2. Linefeed Operation States The linefeed interface includes eight different operating states as described in Table 12. The Linefeed register settings (LF[2:0], Linefeed Register) are also listed. The Open state is the default condition in the absence of any ...
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Table 13. Register and RAM Locations used for Linefeed Control Register / Parameter Mnemonic Linefeed LINEFEED Linefeed Shadow LINEFEED Battery Feed Control RLYCON Loop Current Limit On-Hook Line Voltage Common Mode Voltage V Delta for Off-Hook VOCDELTA OC V Delta ...
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... The Si3232 includes a special modified linefeed scheme that adjusts the ProSLIC’s output impedance based on the linefeed voltage level in order to ensure the ability to source extended loop lengths. When the terminal equipment ...
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... Only one calibration should be necessary as long as the system remains powered up. The Dual ProSLIC calibration sequence consists of SLIC mode calibration, monitor ADC calibration, and audio path calibration. The calibration bits that are set in registers CALR1 and CALR2 are executed in order of MSB to LSB for each sequential register ...
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Si3232 Table 15. Register Values for CM Calibration (600 Ω Impedance Synthesis) Register Register Name Location (decimal) ZRS 4.4.2. Loop Voltage and Current Monitoring The Si3232 continuously monitors the TIP and RING voltages and currents. These values ...
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The maximum power threshold for each device is software-programmable and should be set based on the characteristics of the transistor package, PCB design, and available airflow. If the peak power exceeds the programmed threshold for any device, the power alarm ...
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... Refer to “AN55: Dual ProSLIC™ User Guide” or the Si3232 evaluation board data sheet for layout guidelines for optimal thermal dissipation. ...
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Automatic Dual Battery Switching The Si3232 and Si3200 provide the ability to switch between several user-provided battery supplies to aid thermal management. This method is required during the ringing to off-hook and on-hook to off-hook state transitions. During the ...
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Si3232 Battery SVBAT Sensing 806 kΩ V BLO V BHI Figure 12. External Battery Switching Using the Si3232 and Si3200 When generating a high-voltage ringing amplitude using the Si3220, the power dissipated during the OHT state typically increases due to ...
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VBAT V VBATH BRING 0.1 µF V VBATL BLO V BHI Figure 13. Three-Battery Switching with Si3232 Si3232 806 kΩ SVBAT R5 R9 40.2 kΩ Si3200 BATSEL D1 IN4003 Preliminary Rev. 0.96 Si3232 R101 CXT5401 Q1 R102 10 ...
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Si3232 Table 18. 3-Battery Switching Components Component R101 R102 R103 4.5.1. Loop Closure Detection Loop closure detection is required to accurately signal a terminal device going off-hook during the Active or On- Hook Transmission linefeed states (forward ...
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I Q1 Input I I Digital LOOP Q2 Signal LPF I Processor LCRLPF CMH LFS Figure 14. Loop Closure Detection Circuitry Table 19. Register and RAM Locations used for Loop Closure Detection Parameter Loop Closure Interrupt Pending ...
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Si3232 4.5.2. Ground Key Detection Ground key detection detects an alerting signal from the terminal equipment during the tip open or ring open linefeed states. The functional blocks required to implement a ground key detector are shown in Figure 15, ...
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Table 21. State Transitions During Ground Key Detection # Loop LINEFEED State State 1 LOOP OPEN LFS = 3 (TIP-OPEN) 2 RING-GND LFS = 3 (TIP-OPEN) 3 RING-GND LFS = 1 (FWD-ACTIVE) 4 LOOP CLOSURE LFS = 1 (FWD-ACTIVE) 5 ...
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Si3232 Table 22. Register and RAM Locations used for Ground Key Detection Parameter Register/ Mnemonic Ground Key Interrupt Pend- IRQVEC2 ing Ground Key Interrupt Enable Linefeed Shadow LINEFEED Ground Key Detect Status Ground Key Detect LONGDBI Debounce Interval Longitudinal Current ...
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... The resulting ringing signal seen across TIP-RING is twice the amplitude of the ringing waveform on either the TIP or the RING line, which allows the ringing circuitry to withstand only half the total ringing amplitude seen across TIP-RING. V RING SLIC V OFF V TIP GND V V ...
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Si3232 Table 23. Register and RAM Locations used for Ringing Generation Parameter Ringing Waveform Ringing Active Timer Enable Ringing Inactive Timer Enable Ringing Oscillator Enable Monitor Ringing Oscillator Active Timer Ringing Oscillator Inactive Timer Linefeed Control (Initiates Ringing State) On-Hook ...
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RINGAMP = -------------------- - 2 4 160.173 1.99211 In addition to the variable frequency and amplitude, there is a selectable dc offset (V OFF to the waveform. The dc ...
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Si3232 which the RING lead oscillates. The dc offset is set point equal to V – (– the value that is input into the RINGOF RAM location. Positive V values cause the dc ...
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... Ring Trip Timeout Counter The Dual ProSLIC incorporates a ringtrip timeout counter, RTCOUNT, that monitors the status of the ringing control. When exiting ringing, the Dual ProSLIC will allow the ringtrip timeout counter amount of time (RTCOUNT x 1.25 ms/LSB) for the mode to switch to On-hook Transmission or Active ...
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... Si3232 4.11. Loop Closure Mask The Dual ProSLIC implements a loop closure mask to ensure mode change between Ringing and Active or On-hook Transmission without causing an erroneous loop-closure detection. The loop-closure mask register, LCRMASK, should be set such that loop-closure detections are ignored for (LCRMASK x 1.25 ms/LSB) ...
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Table 24. Recommended Ring Trip Detection Values Ringing DC Offset RTPER Frequency Added? 16–32 Hz Yes 800/f No 800/f 33–60 Hz Yes 2(800/f No 2(800/f Notes: 1. All calculated values should be rounded to the nearest integer. 2. Refer to ...
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... V/5 V Relay (polarized or non-polarized) Figure 22. Driving Relays with V The maximum allowable R using the following equation: MaxR DRV ( V DD,MIN ------------------------------------------------------------------------------------------------ - R β where Q1,MIN Table 26. Recommended R supply, DD ProSLIC V DD 3.3 V ±5% 3.3 V ± 3 supply voltage, an ±5% 3.3 V ±5% 3.3 V ±5% Table 26 provides for typical relay ...
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Polarity Reversal The Si3232 supports polarity reversal for message- waiting functionality as well as various signaling modes. The ramp rate can be programmed for a smooth transition or an abrupt transition to accommodate different application requirements. A wink function ...
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Si3232 Set VOCZERO bit -10 -20 -30 -40 -50 V (V) TIP/RING Figure 23. Wink Function with Programmable Ramp Rate 4.13. Two-Wire Impedance Synthesis Two-wire impedance synthesis is performed on-chip to optimally match the output ...
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PMAMPL = ----------------------- - 2 – coeff + where Full Scale The pulse metering oscillator has a volume envelope (linear ramp) on ...
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Si3232 BUF A Metering Figure 25. Pulse Metering Generation Block Diagram 4.14. Audio Path Processing The Si3232 is designed to connect directly to integrated access device (IAD) chipsets, such as the Broadcom BCM3341, as well as other ...
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The resulting gain levels using the ARX stage are summarized in Table 30. All settings assume an external codec with 475 Ω per leg of source impedance driving the RX inputs differentially at VRXPa-VRXNa (for channel a) or VRXPb-VRXNb (for ...
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Si3232 When a resource reaches an interrupt condition, it signals an interrupt to the interrupt control block. The interrupt control block then sets the associated bit in the interrupt status register if the mask bit for that interrupt is set. ...
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Refer to "2. Typical Application Schematic" on page 17. The pulldown resistor on the SDO pin is required to allow this node to discharge after a logic high state to a tri-state condition. The discharge occurs while SDO is tri-stated ...
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Si3232 4.17. Si3232 RAM and Register Space The Si3232 is a highly-programmable telephone linecard solution that uses internal registers and RAM to program operational parameters and modes. The Register Summary and RAM Summary are compressed listings for single-entry quick reference. ...
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SDO CS CS CPU SDI SDO SPI Clock SCLK CS SDO SCLK CS SDO SCLK Figure 27. SPI Daisy Chain Control Architecture Preliminary Rev. 0.96 Si3232 SDI0 SDI Channel 0 SDI1 Si3232 #1 Channel 1 SDITHRU SDI2 SDI Channel 2 ...
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Si3232 In Figure 28, the CID field this field is decremented (LSB to MSB order), the value decrements for each SDI down the line. The BRDCST, R/W, and REG/RAM bits remain unchanged as the control word passes ...
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Figures 29 and 30 illustrate WRITE and READ operations to registers via an 8-bit SPI controller. These operations are each performed as a 3-byte transfer asserted between each byte necessary for asserted before ...
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Si3232 Figures 33–36 illustrate the various cycles for accessing RAM address locations. RAM addresses are 16-bit entities; therefore the accesses always require four bytes. CS SCLK SDI CONTROL SDO Figure 33. RAM Write Operation via an 8-Bit SPI Port CS ...
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During RAM address accesses, ADDRESS, and DATA are captured in the SPI module. At the completion of the ADDRESS byte of a READ access, the contents of the channel-based data buffer are moved into the data register in the SPI ...
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... I I –I LOOP TIP RING = LONG TIP The SLIC diagnostic capability consists of a peak detect block and two filter blocks, one for dc and one for ac. The topology is illustrated in Figure 38. Preliminary Rev. 0.96 Comments 800 Hz update rate and dc post- rms PK processing blocks ...
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... VLOOP VLONG ILOOP ILONG Figure 38. SLIC Diagnostic Filter Structure The peak detect filter block will report the magnitude of the largest positive or negative value without sign. The dc filter block consists of a single pole IIR low-pass filter with a coefficient held in the DIAGDCCO indirect register ...
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Si3232 Ringing voltage verification. This test verifies that the desired ringing signal has been correctly applied to the TIP/RING pair and can be measured in the 8- bit monitor ADC, which senses low-frequency signals directly across T-R. Power induction measurement. ...
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Control Register Summary Any register not listed here is reserved and must not be written. Shaded registers are read only. All registers are assigned a default value during initialization and following a system reset. Only registers 0, 2, ...
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... Polarity Reversal RAM Access RAMADDR[7:0] RAMDAT[15:8] RAMDAT[7:0] Soft Reset Ringing 4 4 ENSYNC RDACEN RINGUNB TAEN RINGTA[15:8] RINGTA[7:0] RINGTI[15:8] RINGTI[7:0] Relay Configuration 5 BSEL RRAIL SLIC Bias Control STDBY SQLCH CAPB BIASEN Si3200 Thermometer 4 5 STAT SEL Impedance Synthesis Coefficients ZSDIS ZSOHT ZP[1:0] Preliminary Rev ...
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Control Descriptions AUDGAIN: Audio Gain Control (Register Address 21) (Register type: Initialization Name CMTXSEL ATXMUTE Type R/W R/W Reset settings = 0x00 Bit Name 7 CMTXSEL Transmit Path Common Mode Select. Selects common mode reference for ...
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Si3232 CALR1: Calibration 1 (Register Address 11) (Register type: Initialization) Bit D7 D6 Name CAL CALOFFR CALOFFT CALOFFRN CALOFFTN CALDIFG Type R/W Reset settings = 0x3F Bit Name 7 CAL Calibration Control/Status Bit. Begins system calibration routine Normal ...
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CALR2: Calibration 2 (Register Address 12) (Register type: Initialization) Bit D7 D6 Name CALLKGR Type Reset settings = 0x3F Bit Name 7:6 Reserved Read returns zero. 5 CALLKGR RING Leakage Calibration Normal operation or calibration complete ...
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... SLIC diagnostics filters disabled SLIC diagnostics filters enabled. 2:0 SDIAGIN[2:0] SLIC Diagnostics Filter Input. Selects the input to the SLIC diagnostics filter for dc and low-frequency line parameters. 000 = TIP voltage. 001 = RING voltage. 010 = Loop voltage, V 011 = Longitudinal voltage, (V 100 = Loop (metallic) current. ...
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ID: Chip Identification (Register Address 0) (Register type: Initialization/single value instance for both channels) Bit D7 D6 Name PARTNUM[2:0] Type Reset settings = 0xxx Bit Name 7 Reserved Read returns zero. 6:4 PARTNUM[2:0] Part Number Identification. 000-010 = Reserved 011 ...
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Si3232 IRQ0: Interrupt Status 0 (Register Address 14) (Register type: Operational/single value instance for both channels) Bit D7 D6 Name CLKIRQ IRQ3B IRQ2B Type R R Reset settings = 0x00 Read this interrupt to indicate which interrupt status byte, from ...
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IRQ1: Interrupt Status 1 (Register Address 15) (Register type: Operational/bits writable in GCI mode only) Bit D7 D6 Name PULSTAS PULSTIS RINGTAS RINGTIS Type R/W R/W Reset settings = 0x00 Bit Name 7 PULSTAS Pulse Metering Active Timer Interrupt Pending. ...
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Si3232 IRQ2: Interrupt Status 2 (Register Address 16) (Register type: Operational/bits writable in GCI mode only) Bit D7 D6 Name RAMIRS Type Reset settings = 0x00 Bit Name 7:6 Reserved Read returns zero. 5 RAMIRS RAM Access Interrupt Pending. 0 ...
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IRQ3: Interrupt Status 3 (Register Address 17) (Register type: Operational/bits writable in GCI mode only) Bit D7 D6 Name CMBALS PQ6S Type R/W Reset settings = 0x00 Bit Name 7 CMBALS Common Mode Balance Interrupt Pending interrupt ...
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Si3232 IRQEN1: Interrupt Enable 1 (Register Address 18) (Register type: Initialization) Bit D7 D6 Name PULSTAE PULSTIE RINGTAE RINGTIE Type R/W R/W Reset settings = 0x00 Bit Name 7 PULSTAE Pulse Metering Active Timer Interrupt Enable Interrupt masked. ...
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IRQEN2: Interrupt Enable 2 (Register Address 19) (Register type: Initialization) Bit D7 D6 Name RAMIRE Type Reset settings = 0x00 Bit Name 7:6 Reserved Read returns zero. 5 RAMIRE RAM Access Interrupt Enable Interrupt masked Interrupt ...
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Si3232 IRQEN3: Interrupt Enable 3 (Register Address 20) (Register type: Initialization) Bit D7 D6 Name CMBALE PQ6E Type R/W Reset settings = 0x00 Bit Name 7 CMBALE Common Mode Balance Interrupt Enable Interrupt masked Interrupt enabled. ...
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LBCON: Loopback Enable (Register Address 22) (Register type: Diagnostic) Bit D7 D6 Name DLM Type R/W Reset settings = 0x00 Bit Name 7 DLM Codec Loopback Mode Enable Codec loopback mode disabled Codec loopback mode enabled. ...
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Si3232 LINEFEED: Linefeed Control (Register Address 6) (Register type: Operational) Bit D7 D6 Name LFS[2:0] Type Reset settings = 0x00 Bit Name 7 Reserved Read returns zero. 6:4 LFS[2:0] Linefeed Shadow. This register reflects the actual realtime linefeed status. Automatic ...
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MSTREN: Master Initialization Enable (Register Address 2) (Register type: Initialization/single value instance for both channels) Bit D7 D6 Name PLLFLT FSFLT PCFLT Type R/W R/W Reset settings = 0x00 Bit Name 7 PLLFLT PLL Lock Fault Enable PLLFAULT ...
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Si3232 MSTRSTAT: Master Initialization Status (Register Address 3) (Register type: Initialization/single value instance for both channels) Bit D7 D6 Name PLLFAULT FSFAULT PCFAULT Type R/W R/W Reset settings = 0x00 Bit Name 7 PLLFAULT PLL Lock Fault Status. This bit ...
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PMCON: Pulse Metering Control (Register Address 28) (Register type: Operational) Bit D7 D6 Name ENSYNC Type R Reset settings = 0x00 Bit Name 7 ENSYNC Pulse Metering Waveform Present Flag. Indicates a pulse-metering waveform is present pulse ...
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Si3232 PMTALO: Pulse Metering Oscillator Active Timer—Low Byte (Register Address 29) (Register type: Initialization) Bit D7 D6 Name Type Reset settings = 0x00 Bit Name 7:0 PULSETA[7:0] Pulse Metering Oscillator Active Timer. This register contains the lower 8 bits of ...
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POLREV: Polarity Reversal Settings (Register Address 7) (Register type: Initialization) Bit D7 D6 Name Type Reset settings = 0x00 Bit Name 7:4 Reserved Read returns zero. 3 POLREV Polarity Reversal Status Forward polarity Reverse polarity. 2 ...
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Si3232 RAMDATHI: RAM Data—High Byte (Register Address 102) (Register type: Operational/single value instance for both channels) Bit D7 D6 Name Type Reset settings = 0x00 Bit Name 7:0 RAMDAT[15:8] RAM Data—High Byte. A write to RAMDAT followed by a write ...
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RAMSTAT: RAM Address Status (Register Address 4) (Register type: Operational) Bit D7 D6 Name Type Reset settings = 0x00 Bit Name 7:1 Reserved Read returns zero. 0 RAMSTAT RAM Address Status RAM ready for access RAM ...
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Si3232 RINGCON: Ringing Configuration (Register Address 23) (Register type: Initialization) Bit D7 D6 Name ENSYNC RDACEN RINGUNB Type R R Reset settings = 0x00 Bit Name 7 ENSYNC Ringing Waveform Present Flag ringing waveform present ...
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RINGTAHI: Ringing Oscillator Active Timer—High Byte (Register Address 25) (Register type: Initialization) Bit D7 D6 Name Type Reset settings = 0x00 Bit Name 7:0 RINGTA[15:8] Ringing Oscillator Active Timer. This register contains the upper 8 bits of the ringing oscillator ...
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Si3232 RINGTILO: Ringing Oscillator Inactive Timer—Low Byte (Register Address 26) (Register type: Initialization) Bit D7 D6 Name Type Reset settings = 0x00 Bit Name 7:0 RINGTI[7:0] Ringing Oscillator Inactive Timer. This register contains the lower 8 bits of the ringing ...
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... ABIAS[1:0] SLIC Bias Level, Active State. DC bias current flowing in the SLIC circuit during the active off-hook state. Increasing this value increases the ability of the SLIC to withstand longitudinal current artifacts per lead per lead per lead per lead. ...
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Si3232 THERM: Si3200 Thermometer (Register Address 72) (Register type: Diagnostic/single value instance for both channels) Bit D7 D6 Name STAT SEL Type R R/W Reset settings = 0x00 Bit Name 7 STAT Si3200 Thermometer Status. Reads whether the Si3200 has ...
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ZZ: Impedance Synthesis—Analog Complex Coefficient (Register Address 34) (Register type: Initialization/single value instance for both channels) Bit D7 D6 Name ZSDIS ZSOHT Type R/W R/W Reset settings = 0x00 Bit Name 7 ZSDIS Analog Impedance Synthesis Coefficient Disable. Enables/disables RS, ...
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... Si3232 7. 16-Bit RAM Address Summary All internal 16-bit RAM addresses can be assigned unique values for each SLIC channel and are accessed in a similar manner as the 8-bit control registers except that the data are twice as long. In addition, one additional READ cycle is required during READ operations to accommodate the one-deep pipeline architecture. (See "4.16. ...
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RAM Mnemonic Description Addr 26 LCRMASK Loop Closure Mask Interval Coeff 166 LCRMSKPR LCR Mask During Polarity Reversal 22 LCROFFHK Off-Hook Detect Threshold 23 LCRONHK On-Hook Detect Threshold 29 LONGDBI Ground Key Detection Debounce Interval 27 LONGHITH Ground Key Detection ...
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Si3232 RAM Mnemonic Description Addr 57 RINGFRHI Ringing Frequency— High Byte 58 RINGFRLO Ringing Frequency— Low Byte 56 RINGOF Ringing Waveform dc Offset 60 RINGPHAS Ringing Oscillator Initial Phase 66 RTACDB AC Ring Trip Debounce Interval 64 RTACTH AC Ring ...
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Control Descriptions BATHTH: High Battery Switch Threshold (RAM Address 31) Bit D15 D14 D13 D12 Name BATHTH[14:7] Type Reset settings = 0x00 Bit Name 14:7 BATHTH[14:7] High Battery Switch Threshold. Programs the voltage threshold for selecting the high ...
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Si3232 BSWLPF: RING Voltage Filter Coefficient (RAM Address 33) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:3 BSWLPF[15:3] RING Voltage Filter Coefficient. Programs the digital low-pass filter block that filters the voltage measured on ...
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... Provides a filtered value that reflects the ac rms value from the output of the monitor ADC. The input to the monitor ADC is selected by the setting in the SDIAG register (Register 13). The DIAGACCO RAM location determines the rms filter coefficient used. This register is used for frequencies < 300 Hz. DIAGACCO: SLIC Diagnostics AC Filter Coefficient (RAM Address 54) Bit D15 D14 ...
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... Si3232 DIAGDCCO: SLIC Diagnostics dc Filter Coefficient (RAM Address 52) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:3 DIAGDCCO[15:3] SLIC Diagnostics dc Filter Coefficient. Programs the low-pass filter coefficient used in the dc measurement result from the monitor ADC. DIAGPK: SLIC Diagnostics Peak Detector (RAM Address 55) ...
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ILOOP: Loop Current Sense Value (RAM Address 8) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 ILOOP[15:0] Loop Current Sense Value. Holds the realtime measured loop current 101.09 mA measurement range, 3.097 ...
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Si3232 IRINGP: (Transistor Q2) Current Measurement (RAM Address 15) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 IRINGP[15:0] IRINGP (Transistor Q2) Current Measurement. Reflects the current flowing into the IRINGP pin of the Si3200 ...
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ITIPP: (Transistor Q1) Current Measurement (RAM Address 14) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 ITIPP[15:0] ITIPP (Transistor Q1) Current Measurement. Reflects the current flowing into the ITIPP pin of the Si3200 (transistor ...
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Si3232 LCRMASK: Loop Closure Mask Interval Coefficient (RAM Address 26) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 LCRMASK[15:0] Loop Closure Mask Interval Coefficient. Programs the loop closure detection mask interval. Programmable range is ...
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LCRONHK: Loop Closure Detection Threshold—Off-Hook to On-Hook Transition (RAM Address 23) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 LCRONHK[15:0] Loop Closure Detection Threshold—Off-Hook to On-Hook Transition. Programs the loop current threshold at which ...
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Si3232 LONGLOTH: Ground Key Removal Detection Threshold (RAM Address 28) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 LONGLOTH[15:0] Ground Key Removal Detection Threshold. Programs the longitudinal current threshold at which it is determined ...
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PLPF34: Q3/Q4 Thermal Low-pass Filter Coefficient (RAM Address 41) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:3 PLPF34[15:3] Q3/Q4 Thermal Low-pass Filter Coefficient. Programs the thermal low-pass filter value used to calculate the power ...
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Si3232 PMAMPTH: Pulse Metering AGC Amplitude Threshold (RAM Address 70) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 PMAMPTH[15:0] Pulse Metering AGC Amplitude Threshold. Programs the voltage threshold for the automatic gain control (AGC) ...
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PQ1DH: Q1 Calculated Power (RAM Address 44) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 PQ1DH[15:0] Q1 Calculated Power. Provides the calculated power in transistor Q1 when used with discrete linefeed cir- cuitry. 0 ...
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Si3232 PQ4DH: Q4 Calculated Power (RAM Address 47) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 PQ4DH[15:0] Q4 Calculated Power. Provides the calculated power in transistor Q4. Used with discrete linefeed circuitry ...
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PSUM: Total Calculated Power (RAM Address 50) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 PSUM[15:0] Total Calculated Power. Provides the total calculated power in transistors Q1 through Q6. Using the Si3200, this RAM ...
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Si3232 PTH34: Q3/Q4 Power Alarm Threshold (RAM Address 38) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 PTH34[15:0] Q3/Q4 Power Alarm Threshold. Programs the power threshold in transistors Q3 and Q4 at which a ...
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RINGAMP: Ringing Amplitude (RAM Address 59) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 RINGAMP[15:0] Ringing Amplitude. This RAM location programs the peak ringing amplitude. Refer to "4.6. Ringing Gen- eration" on page 37 ...
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Si3232 RINGOF: Ringing Waveform dc Offset (RAM Address 56) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 14:0 RINGOF[14:0] Ringing Waveform dc Offset. Programs the amount of dc offset that is added to the ringing ...
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RTACTH: AC Ring Trip Detect Threshold (RAM Address 64) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 RTACTH[15:0] AC Ring Trip Detect Threshold. Programs the ac loop current threshold value above which a valid ...
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Si3232 RTPER: Ring Trip Low-pass Filter Coefficient (RAM Address 63) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 RTPER[15:0] Ring Trip Low-pass Filter Coefficient. Programs the low-pass filter coefficient used in the ring trip ...
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VBAT: Scaled Battery Voltage Measurement (RAM Address 13) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 VBAT[15:0] Scaled Battery Voltage Measurement. Reflects the battery voltage measured through the monitor ADC 160.173 V ...
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Si3232 VOC: Open Circuit Voltage (RAM Address 0) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 14:0 VOC[14:0] Open Circuit Voltage. Programs the TIP-RING voltage during on-hook conditions. The recommended value but ...
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VOCLTH: V Delta Lower Threshold (RAM Address 2) OC Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 15:0 VOCLTH[15:0] V Delta Lower Threshold. OC Programs the voltage delta below the VOC value at which the ...
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Si3232 VOVRING: Ringing Overhead Voltage (RAM Address 6) Bit D15 D14 D13 D12 Name Type Reset settings = 0x00 Bit Name 14:0 VOVRING[14:0] Ringing Overhead Voltage. Programs the overhead voltage between the peak negative ringing level and VBATH. This value ...
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... Transconductance Amplifier Resistor Input Connection. Differential Capacitor— Capacitor used in low-pass filter to stabilize SLIC feedback loops. Common Mode Capacitor— Capacitor used in low-pass filter to sta- bilize SLIC feedback loops. Component Reference Ground— Return path for differential and common-mode capacitors. Do not connect to system ground. I IREF Current Reference— ...
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... I Differential Analog Receive Input for SLIC Channel b. O Differential Analog Transmit Output for SLIC Channel b. I Reset— Active low. Hardware reset used to place all control registers in known state. An internal pulldown resistor asserts this pin low when it is not driven externally. ...
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... When active, serial port is operational. O Differential Analog Transmit Output for SLIC Channel a. I Differential Analog Receive Input for SLIC Channel a. Exposed Die Paddle Ground. Connect to a low-impedance ground plane via topside PCB pad directly under the part. See "12. Package Outline: 64-Pin eTQFP" on page 123 for PCB pad dimensions ...
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Si3232 10. Pin Descriptions: Si3200 Pin #(s) Symbol Input/ Output 1 TIP I RING I/O 4 VBAT 5 VBATH 6 VBATL — 7 GND 8 VDD 9 BATSEL IRINGN I 13 ...
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Pin #(s) Symbol Input/ Description Output 15 ITIPN I Negative TIP Current Control —Connect to the ITIPN lead of the Si3232. 16 ITIPP I Positive TIP Current Control —Connect to the ITIPP lead of the Si3232. epad GND Exposed Die ...
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Si3232 11. Ordering Guide Part Number Si3232-X-FQ Si3232-X-GQ Si3200-X-FS Si3200-X-GS Si3200-KS Si3200-BS Notes: 1. Add an “R” at the end of the device to denote tape and reel option; 2500 quantity per reel. 2. “X” denotes product revision. 122 Package ...
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Package Outline: 64-Pin eTQFP Figure 39 illustrates the package details for the Si3232. Table 33 lists the values for the dimensions shown in the illustration. Figure 39. 64-Pin Thin Quad Flat Package (TQFP) Table 33. 64-Pin Package Diagram Dimensions ...
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Si3232 13. Package Outline: 16-Pin ESOIC Figure 40 illustrates the package details for the Si3201. Table 34 lists the values for the dimensions shown in the illustration . –A– ...
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... UPPORT OCUMENTATION AN55: Dual ProSLIC User Guide AN63: Si322x Coefficient Generator User's Guide AN64: Dual ProSLIC LINC User Guide AN68: 8-Bit Microcontroller Board Hardware Reference Guide AN71: Si3220/Si3225 GR-909 testing AN74: SiLINKPS-EVB User's Guide AN86: Ringing/Ringtrip Operation and Architecture on the Si3220/Si3225 Si3232PPT0-EVB Data Sheet Note: Refer to www ...
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Si3232 OCUMENT HANGE IST Revision 0.95 to Revision 0.96 The following changes are specific to Rev G of the Si3232 silicon: "4.5.2. Ground Key Detection" on page 34 Added descriptive text and I LONG Register , “ID: ...
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N : OTES Preliminary Rev. 0.96 Si3232 127 ...
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... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap- plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, and ProSLIC are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. ...