EGLXT973QEA3V Cortina Systems Inc, EGLXT973QEA3V Datasheet - Page 51

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EGLXT973QEA3V

Manufacturer Part Number
EGLXT973QEA3V
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of EGLXT973QEA3V

Lead Free Status / RoHS Status
Compliant

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LXT973 Transceiver
Datasheet
249426, Revision 6.0
13 July 2007
4.3
4.4
4.5
Cortina Systems
Initialization
At power-up or reset, the LXT973 Transceiver performs the initialization as shown in
Figure 18 on page
Manual Control Mode for that port. When MDDISn is Low, MDIO Control Mode is enabled
for that port. Mode control selection is provided via the MDDISn pin as shown in
on page
MDIO Control Mode
In the MDIO Control mode, the LXT973 Transceiver uses the Hardware Control Interface
to set up initial (default) values of the MDIO registers. Once initial values are set, bit
control reverts to the MDIO interface.
Manual Control Mode
In the Manual Control Mode, LXT973 Transceiver disables direct write operations to the
MDIO registers on the MDIO interface. The Hardware Control Interface is monitored
during Reset to set up the MDIO registers.
®
LXT973 10/100 Mbps Dual-Port Fast Ethernet PHY Transceiver
52.
52. When the MDDISn pin is High, the LXT973 Transceiver enters
4.3 Initialization
Table 12
Page 51

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