TJA1080ATS/1,112 NXP Semiconductors, TJA1080ATS/1,112 Datasheet - Page 5

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TJA1080ATS/1,112

Manufacturer Part Number
TJA1080ATS/1,112
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TJA1080ATS/1,112

Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
5. Pinning information
TJA1080A_4
Product data sheet
5.1 Pinning
5.2 Pin description
Table 2.
Symbol Pin
INH2
INH1
EN
V
TXD
TXEN
RXD
BGE
STBN
TRXD1
TRXD0
RXEN
ERRN
V
WAKE
GND
BM
BP
V
V
Fig 2.
IO
BAT
CC
BUF
Pin configuration
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin description
Type
O
O
I
P
I
I
O
I
I
I/O
I/O
O
O
P
I
P
I/O
I/O
P
P
Rev. 04 — 19 February 2009
TRXD1
TXEN
STBN
INH2
INH1
RXD
BGE
TXD
Description
inhibit 2 output for switching external voltage regulator
inhibit 1 output for switching external voltage regulator
enable input; when HIGH enabled; internal pull-down
supply voltage for V
transmit data input; internal pull-down
transmitter enable input; when HIGH transmitter disabled; internal
pull-up
receive data output
bus guardian enable input; when LOW transmitter disabled; internal
pull-down
standby input; low-power mode when LOW; internal pull-down
data bus line 1 for inner star connection
data bus line 0 for inner star connection
receive data enable output; when LOW bus activity detected
error diagnoses output; when LOW error detected
battery supply voltage
local wake-up input; internal pull-up or pull-down (depends on
voltage at pin WAKE)
ground
bus line minus
bus line plus
supply voltage (+5 V)
buffer supply voltage
V
EN
IO
10
1
2
3
4
5
6
7
8
9
TJA1080ATS/2
IO
voltage level adaptation
015aaa052
20
19
18
17
16
15
14
13
12
11
TJA1080ATS/2
V
V
BP
BM
GND
WAKE
V
ERRN
RXEN
TRXD0
BUF
CC
BAT
FlexRay transceiver
© NXP B.V. 2009. All rights reserved.
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