HFIXF1110CC Intel, HFIXF1110CC Datasheet - Page 73

• Manufacturer Part Number: HFIXF1110CC
• Manufacturer: Intel

Specifications of HFIXF1110CC

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

5.3.3.3
5.3.3.4
5.3.4
5.4
5.4.1
5.4.2
Datasheet
Receiver Operational Overview
The receiver structure performs Clock and Data Recovery (CDR) on the incoming serial data
stream. The quality of this operation is a dominant factor for the Bit Error Rate (BER) system
performance. Feed forward and feedback controls are combined in one receiver architecture for
enhanced performance. The data is over-sampled and a digital circuit detects the edge position in
the data stream. A signal is not generated if an edge is not found. A feedback loop takes care of
low-frequency jitter phenomenon of unlimited amplitude, while a feed forward section suppresses
high-frequency jitter having limited amplitude. The static edge position is held at a constant
position in the over-sampled by a constant adjustment of the sampling phases with the early and
late signals.
Selective Power-Down
The IXF1110 offers the ability to selectively power-down any of the SerDes TX or RX ports that
are not being used. This is done via
page
Timing and Electrical Characteristics
For timing and electrical characteristics for the IXF1110, see
page
Optical Module Interface
Introduction
This section describes the connection of the IXF1110 ports to an optical module, and the
connections supported for correct operation are detailed. The registers used to write control and
read status information are documented in
Overview” on page
The optical module interface allows the IXF1110 a seamless connection to the Small Form Factor
Optical Modules (SFP) that form the system’s physical media connection, eliminating the need for
any FPGAs or CPUs to process data. All required information of the optical modules is available to
the system CPU through the IXF1110 CPU interface, leading to a more integrated, reliable, and
cost-effective system.
IXF1110 Supported Optical Module Interface Signals.
For optical module interface operation, three supported signal subgroups are required, allowing a
more explicit definition of each function and implementation. The three subgroups are as follows:
Table 22
•
•
•
High-Speed Serial Interface
Low-Speed Status Signaling Interface
I
176.
119,
2
C Module Configuration Interface
provides descriptions for IXF1110-to-SFP optical module connection pins.
“Transmitter Characteristics” on page 119
Intel
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
177).
Order Number: 250210, Revision: 009
Intel
“SerDes TX and RX Power-Down Ports 0-9 ($ 0x787)” on
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Section 8.5.9, “Optical Module Interface Block Register
and
“Receiver Characteristics” on page
Figure 39, “SerDes Timing” on
07-Oct-2005
120.
73