HFIXF1110CC Intel, HFIXF1110CC Datasheet - Page 150

• Manufacturer Part Number: HFIXF1110CC
• Manufacturer: Intel

Specifications of HFIXF1110CC

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Intel
07-Oct-2005
150
®
Table 80. Link LED Enable ($ 0x502)
Table 81. Core Clock Soft Reset ($ 0x504)
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Register Description: Per-port bit should be set upon detection of link by system CPU to
enable proper operation of the link LEDs.
Register Description : A soft reset register for the core clock system (for example, the
SYS125 clock).
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
31:10
Bit
9
8
7
6
5
4
3
2
1
0
31:1
Bit
0
Reserved
Link LED Enable Port 9
Link LED Enable Port 8
Link LED Enable Port 7
Link LED Enable Port 6
Link LED Enable Port 5
Link LED Enable Port 4
Link LED Enable Port 3
Link LED Enable Port 2
Link LED Enable Port 1
Link LED Enable Port 0
Intel
Reserved
Core Soft
Reset
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Name
Name
Order Number: 250210, Revision: 009
Reserved
0 = CoreSoftReset reset is inactive
1 = CoreSoftReset reset is active
Reserved
Port 9 link
0 = No link
1 = Link
Port 8 link
0 = No link
1 = Link
Port 7 link
0 = No link
1 = Link
Port 6 link
0 = No link
1 = Link
Port 5 link
0 = No link
1 = Link
Port 4 link
0 = No link
1 = Link
Port 3 link
0 = No link
1 = Link
Port 2 link
0 = No link
1 = Link
Port 1 link
0 = No link
1 = Link
Port 0 link
0 = No link
1 = Link
Description
Description
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Type
R
R/W
R
1
1
0x00000000
0x00000
Default
0x00000000
0x00000000
Default
0
0
0
0
0
0
0
0
0
0
Datasheet
0