HFIXF1110CC Intel, HFIXF1110CC Datasheet - Page 72

• Manufacturer Part Number: HFIXF1110CC
• Manufacturer: Intel

Specifications of HFIXF1110CC

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Intel
5.3.3
5.3.3.1
5.3.3.2
07-Oct-2005
72
®
Table 21. SerDes Driver TX Power Levels
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Functional Description
The SerDes transmit interface sends serialized data at 1.25 GHz. The interface is differential with
two pins for transmit operation. The transmit interface is designed to operate in a 100
environment and all the terminations are included on the device. The outputs are high speed SerDes
and AC coupling is recommended for this interface to ensure that the correct input bias current is
supplied at the receiver.
The SerDes receive interface receives serialized data at 1.25 GHz. The interface is differential with
two pins for the receive operation. The equalizer receives a differential signal that is equalized for
the assumed media channel. The SerDes transmit and receive interfaces are designed to operate
within a 100
Transmitter Operational Overview
The transmit section of the IXF1110 has to serialize the Ten Bit Interface (TBI) data from the
IXF1110 MAC section and outputs this data at 1.25 GHz differential signal levels. The 1.25 GHz
differential SerDes signals are compliant with the Small Form Factor Pluggable (SFP) Multi-
Source Agreement (MSA).
The transmitter section takes the contents of the data register within the MAC and synchronously
transfers the data out, ten bits at a time – Least Significant Bit (LSB) first, followed by the next
Most Significant Bit (MSB). When these ten bits have been serialized and transmitted, the next
word of 10-bit data from the MAC is ready to be serialized for transmission.
The data is transmitted by the high-speed current mode differential SerDes output stage using an
internal 1.25 GHz clock generated from the 125 MHz clock input.
Transmitter Programmable Driver-Power Levels
The IXF1110 SerDes core has programmable transmitter power levels to enhance usability in any
given application.The SerDes Registers are programmable to allow adjustment of the transmit core
driver output power. When driving a 100
tings effectively establish the differential voltage swings at the driver output.
The (Register) allows the selection of 4 discrete power settings. The selected power setting of these
inputs is applied to each of the transmit cores drivers on a per-port basis.
Signal Summary”
Driver Power Control inputs. The normalized current setting is 10 mA which corresponds to the nor-
malized power setting of 1.0. This is the default setting of the IXF1110 SerDes interface. Other val-
ues listed in the Normalized Driver Power Setting column are multiples of 10 mA. For example,
with inputs at 1110, the driver power is .5 x 10 mA = 5 mA.
NOTE: All other values are reserved.
DRVPWRx[3]
0
1
1
1
Intel
®
differential environment and all terminations are included on the device.
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
DRVPWRx[2]
lists the Normalized power setting of the transmit drivers as a function of the
0
0
1
1
Order Number: 250210, Revision: 009
DRVPWRx[1]
1
1
0
1
differential terminated network, these output power set-
DRVPWRx[0]
1
1
1
0
Driver Power
Normalized
Setting
1.33
2.0
1.0
0.5
Table 17, “SPI4-2 Interface
Driver Power
13.3 mA
20 mA
10 mA
5 mA
differential
Datasheet