MC33389DDW Freescale, MC33389DDW Datasheet - Page 39

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MC33389DDW

Manufacturer Part Number
MC33389DDW
Description
Manufacturer
Freescale
Datasheet

Specifications of MC33389DDW

Number Of Transceivers
1
Power Down Mode
Sleep/Standby
Operating Supply Voltage (max)
27V
Operating Supply Voltage (typ)
9/12/15/18/24V
Operating Supply Voltage (min)
5.5V
Package Type
SOIC W
Supply Current
7mA
Operating Temperature (max)
125C
Operating Temperature (min)
-40C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
28
Lead Free Status / RoHS Status
Not Compliant

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Manufacturer
Quantity
Price
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MC33389DDWR2
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Table 36. TESRH Bit Definition
.
Table 37. Transceiver Error Status Register for CANL and Tx (TESRL)
Table 38. TESRL Bit Definition
Table 39. Reset Source Register (RSR)
Table 40. Voltage Supply Status Register (VSSR)
Analog Integrated Circuit Device Data
Freescale Semiconductor
This register reports the source of a reset already occurred.
RSR0: 1 = > V
RSR1: 1 = > Software watchdog reset occurred (RSR 2 = 1 in this case), 0 = > no SW watchdog reset occurred
RSR2: 1 = > External reset occurred (RSR0 = RSR1= 0 in this case), 0 = > no external reset occurred
Events related to the bits in register RSR are latched. All bits can be reset by a Read operation of the register. After a power-ON reset, RSR2
and RSR0 are set to 1. Therefore, the first read out of the register after power-ON delivers RSR[2:0] = [101].
In case of CANH line failures, the appropriate bit(s) are set according to
Read operation. After power-ON is reset, all bits are set to 0.
In case of CANL line failures, the appropriate bit(s) are set according to
Read operation. After power-ON is reset, all bits are set to 0.
Address
Address
Address
TESRL
RESET
This register reports the CANL and Tx permanent failure status
RESET
RESET
This register monitors the status of the V2, V3, and V
VSSR
$01B
$017
RSR
$018
POR
TESRH3
TESRL3
0
0
x
0
1
0
0
0
x
1
DD1
W
W
W
R
R
R
under voltage occurred (RSR2 = 1 in this case), 0 = > no over voltage on V occurred
TESRH2
TESRL2
Bit 7
Bit 7
Bit 7
0
x
x
1
x
0
x
1
x
x
Bit 6
Bit 6
Bit 6
TESRH1
TESRL1
0
0
1
0
0
0
0
0
1
0
Bit 5
Bit 5
Bit 5
BAT
voltage level.
TESRH0
TESRL0
0
1
0
1
x
x
x
x
x
x
Table
Table
Bit 4
Bit 4
Bit 4
38. This information is latched. The register can be reset by a
36. This information is latched. The register can be reset by a
CANL Short Circuit to Ground/CANH mutually shorted to CANL
TESRL3
V3SR
Bit 3
Bit 3
Bit 3
0
0
0
CANH Short Circuit to Ground
CANH Short Circuit to V
CANL Short Circuit to V
CANH Short Circuit to V
CANL Short Circuit to V
CANH Wire Interruption
CANL Wire Interruption
TESRL2
LOGIC COMMANDS AND REGISTERS
RSR2
V2SR
No Failure on CANH
Bit 2
Bit 2
Bit 2
0
0
FUNCTIONAL DEVICE OPERATION
1
0
Description
Description
No Failure
TESRL1
VBSR1
RSR1
Bit 1
Bit 1
Bit 1
0
0
0
BAT
BAT
DD
CC
TESRL0
VBSR0
RSR0
Bit 0
Bit 0
Bit 0
1
1
0
33389
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