MC33389DDW Freescale, MC33389DDW Datasheet - Page 26

• Manufacturer Part Number: MC33389DDW
• Manufacturer: Freescale

Specifications of MC33389DDW

• Number Of Transceivers: 1
• Power Down Mode: Sleep/Standby
• Operating Supply Voltage (max): 27V
• Operating Supply Voltage (typ): 9/12/15/18/24V
• Operating Supply Voltage (min): 5.5V
• Package Type: SOIC W
• Supply Current: 7mA
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 28
• Lead Free Status / RoHS Status: Not Compliant

Local Wake-Up Consequences
wake-up input pin is stored in the readable Wake-Up Input
Control Register (WUIRTI). Wake-ups are detected
according to the selected option. A flag is set in the WUISR.
A maskable interrupt is then sent via INT output.
Normal Request mode (via proper reset of the
microcontroller). A flag is set in the WUISR.
Table 15. SBC Mode vs. Local Wake-Up Behavior
Wake-Up By SPI
supplied by an external V
Sleep mode. In this case, a feature is provided making
possible to wake-up the SBC by SPI activity.
1.5 V), if a falling edge occurs on CS (crossing 2.5 V
threshold), a wake-up by SPI is detected, the SBC switches
to the Normal Request mode. A flag is set in ISR2.
Interrupt Output
• V
• V
• High temperature on V1 or V2
26
33389
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Reset State
Normal Request
Normal Request
In Normal or Stand-by modes, the real time state of each
In the Sleep mode, a local wake-up leads to a jump to
In some applications, the microcontroller might be
After V1 is totally switched OFF in the Sleep mode (V1<
The INT output may be activated in the following cases:
SBC Modes
Normal and
Emergency
BAT
BAT
Stand-by
Sleep
Mode
overvoltage (BatHigh)
undervoltage (BatFail)
Failure Condition)
Event is Stored in WUISR. The SBC may Activate
V1: ON (Unless
Event is Stored in WUISR. The SBC Switches to
Regulators, V3
V1: ON (75 ms
Real Time State of Each Wake-Up Input Pin
Detection Active According to the Option. The
Detection Active According to the Option. The
Timeout)
V1 & V2
V2: OFF
V2: OFF
V3: OFF
V3:OFF
Switch
DD
Available in WUIRTI Register
, remaining powered in SBC
Local Wake-Up Behaviour
Normal Request Mode
No Detection
No Detection
INT Output.
Capabilities
(if enabled)
Wake-Up
—
—
Figure 12. SBC Operation Mode
(Active Low -go to
Reset State if V1
(Duration 1 ms)
Under Voltage
Reset Pin
Occurs)
(RST)
High
Low
• Pre-warning temperature on V1 or V2
• CAN bus failure
• SPI error
• Local wake-up (can be used for low battery detection)
• Bus wake-up
Registers Descriptions on page
Reset Input/Output
reset duration from SBC to microcontroller is 1 ms. If
extended times are required, an external capacitor can be
used. SBC provides two RST output pull-up currents.
300 µA pull up when reset voltage is higher than 2.5 V.
forced to the Normal Request mode after RST is released by
the microcontroller.
GROUND SHIFT DETECTION
CAN transmission can afford some ground shift between
different nodes without trouble. Nevertheless, in case of bus
failure, the transceiver switches to single-wire operation,
therefore working with less noise margin. The affordable
ground shift is decreased in this case.
diagnosis purpose. Four ground shift levels (GSL) are
selectable and the detection is stored in the GSL register,
accessible via the SPI.
Detection Principle
different values (-0.7 V, -1.2 V, -1.7 V, -2.2 V). The CANH
voltage is sensed at each TX falling edge (end of recessive
state). If it is detected to be below the selected ground shift
threshold, the bit SHIFT is set at one in the GSL register. No
filter is implemented. Required filtering for reliable detection
should be achieved by software (e.g. several trials).
The Reset (RST) pin is an input/output pin. The typical
A typical 30 µA pull up when Vreset is below 2.5 V and a
RST is also an input for the SBC. It means the 33389 is
When normally working in a two-wire operating mode, the
The SBC is provided with a ground shift detection for
The ground shift to detect is selected via the SPI from four
All these interrupts are maskable. Please see the
Interrupt Pin
INT
—
—
Analog Integrated Circuit Device Data
Watchdog
Software
34.
—
—
Freescale Semiconductor
Term V
Term V
CAN Cell
BAT
BAT
SPI