IDT77105L25TF8 IDT, Integrated Device Technology Inc, IDT77105L25TF8 Datasheet - Page 19

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IDT77105L25TF8

Manufacturer Part Number
IDT77105L25TF8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT77105L25TF8

Data Rate
25.6Mbps
Number Of Channels
1
Type Of Atm Phy Interface
UTOPIA
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
UTOPIA Bus Timing Parameters
UTOPIA Bus Timing Parameters
UTOPIA Bus Timing Parameters
UTOPIA Bus Timing Parameters
TxOSC and Reset Timing
TxOSC and Reset Timing
TxOSC and Reset Timing
TxOSC and Reset Timing
IDT77105
RxEmpty/RxClav
Tcyc
Tch
Tcl
Trpw
Symbol
1.
RxData [7:0],
Trpw must meet both minimum limits.
1
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
t15
Symbol
RxSOC
RxParity
RxCLK
RxEnb
RxRef
TxOSC frequency (25.6 Mbps)
TxOSC high duty cycle (% of Tcyc)
TxOSC low duty cycle (% of Tcyc))
Minimum Resetpulse width
Hi-Z
Hi-Z
RxEnb set up time to RxCLK
RxEnb hold time from RxCLK
tPD from RxCLK to RxSOC, RxData, and RxRef
RxEmpty delay from RxCLK
TxData[7:0], TxParity setup time to TxCLK
TxData[7:0], TxParity hold time from TxCLK
TxSOC, TxEnb setup time to TxCLK
TxSOC, TxEnb hold time from TxCLK
TxFull delay from TxCLK
TxRef pulse width
RxCLK period
RxCLK duty cycle (T of t11)
TxCLK period
TxCLK duty cycle (% of t13)
RxCLK to RxData [7:0], RxParity, and RxSOC low impedance
t
1
Parameter
t
2
t15
Parameter
Octet 0
Figure 17 UTOPIA Receive
t
3
19 of 24
Octet 1
t11
31.5
40
40
2* TxCLK period
2* RxCLK period
Octet 2
10
2
3
1
10
2
10
2
1
TxCLK Period +5ns
30
40
30
40
2
Min.
t12
Min.
32
50
50
Typ.
t
10
20
20
400
60
400
60
12
4
Max.
32.5
50
50
Max.
Octet 49
September 11, 2000
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
MHz
%
%
Unit
3445 drw 20
Oct

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