MT48LC32M16A2TG-75 IT:C Micron Technology Inc, MT48LC32M16A2TG-75 IT:C Datasheet - Page 23

• Manufacturer Part Number: MT48LC32M16A2TG-75 IT:C
• Description: DRAM Chip SDRAM 512M-Bit 32Mx16 3.3V 54-Pin TSOP-II Tray
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC32M16A2TG-75 IT:C

• Density: 512 Mb
• Maximum Clock Rate: 133 MHz
• Package: 54TSOP-II
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 6|5.4 ns
• Operating Temperature: -40 to 85 °C
• Organization: 32Mx16
• Address Bus: 15b
• Access Time (max): 6/5.4ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 115mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Not Compliant

Figure 11:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
Consecutive READ Bursts
Note:
COMMAND
COMMAND
ADDRESS
ADDRESS
Each READ command may be to any bank. DQM is LOW.
CLK
CLK
DQ
DQ
BANK,
T0
BANK,
T0
COL n
COL n
READ
READ
CL = 2
T1
T1
NOP
NOP
CL = 3
T2
T2
NOP
NOP
23
D
OUT
n
T3
T3
NOP
NOP
n + 1
D
D
Micron Technology, Inc., reserves the right to change products or specifications without notice.
OUT
OUT
n
Transitioning Data
T4
BANK,
T4
BANK,
READ
COL b
READ
COL b
x = 1 cycle
n + 2
n + 1
D
D
OUT
OUT
x = 2 cycles
T5
T5
NOP
NOP
512Mb: x4, x8, x16 SDRAM
n + 2
n + 3
D
D
OUT
OUT
T6
T6
NOP
NOP
n + 3
D
D
©2000 Micron Technology, Inc. All rights reserved.
OUT
OUT
b
Don’t Care
T7
NOP
D
OUT
b
Operations