8523BGLF Integrated Device Technology (Idt), 8523BGLF Datasheet - Page 3

• Manufacturer Part Number: 8523BGLF
• Description: Clock Driver 2-IN HSTL 20-Pin TSSOP Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 8523BGLF

• Package: 20TSSOP
• Configuration: 1 x 2:1
• Input Signal Type: CML|HCSL|HSTL|LVDS|LVPECL|SSTL
• Maximum Output Frequency: 650 MHz
• Operating Supply Voltage: 3.3 V

ICS8523 Data Sheet
Function Tables
Table 3A. Control Input Function Table
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as shown in Figure 1.
In the active mode, the state of the outputs are a function of the CLK, nCLK and PCLK, nPCLK inputs as described in Table 3B.
Figure 1. CLK_EN Timing Diagram
Table 3B. Clock Input Function Table
ICS8523CG REVISION E JANUARY 24, 2011
nCLK, nPCLK
CLK, PCLK
Biased; NOTE 1
Biased; NOTE 1
CLK or PCLK
CLK_EN
nQ[0:3]
Q[0:3]
CLK_EN
0
1
0
1
0
0
1
1
Inputs
nCLK or nPCLK
Biased; NOTE 1
Biased; NOTE 1
0
1
0
1
CLK_SEL
Disabled
Inputs
0
1
0
1
Q[0:3]
HIGH
HIGH
HIGH
LOW
LOW
LOW
Selected Source
Outputs
PCLK, nPCLK
PCLK, nPCLK
CLK, nCLK
CLK, nCLK
nQ[0:3]
HIGH
HIGH
HIGH
LOW
LOW
LOW
3
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-HSTL FANOUT BUFFER
Single-Ended to Differential
Single-Ended to Differential
Single-Ended to Differential
Single-Ended to Differential
Differential to Differential
Differential to Differential
Input to Output Mode
Disabled; LOW
Disabled; LOW
Enabled
Enabled
Enabled
Q[0:3]
©2011 Integrated Device Technology, Inc.
Outputs
Disabled; HIGH
Disabled; HIGH
Enabled
Enabled
nQ[0:3]
Non-Inverting
Non-Inverting
Non-Inverting
Non-Inverting
Inverting
Inverting
Polarity