8523BGLF Integrated Device Technology (Idt), 8523BGLF Datasheet - Page 2

• Manufacturer Part Number: 8523BGLF
• Description: Clock Driver 2-IN HSTL 20-Pin TSSOP Tube
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 8523BGLF

• Package: 20TSSOP
• Configuration: 1 x 2:1
• Input Signal Type: CML|HCSL|HSTL|LVDS|LVPECL|SSTL
• Maximum Output Frequency: 650 MHz
• Operating Supply Voltage: 3.3 V

ICS8523 Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
ICS8523CG REVISION E JANUARY 24, 2011
Symbol
C
R
R
IN
PULLUP
PULLDOWN
Number
11, 12
13, 18
14, 15
16, 17
19, 20
8, 9
10
1
2
3
4
5
6
7
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
CLK_SEL
CLK_EN
nQ3, Q3
nQ2, Q2
nQ1, Q1
nQ0, Q0
nPCLK
Name
PCLK
nCLK
V
GND
CLK
V
DDO
nc
DD
Unused
Output
Output
Output
Output
Power
Power
Power
Input
Input
Input
Input
Input
Input
Type
Pulldown
Pulldown
Pulldown
Pullup
Pullup
Pullup
Test Conditions
Description
Power supply ground.
Synchronizing clock enable. When HIGH, clock outputs follow clock input.
When LOW, Qx outputs are forced low, nQx outputs are forced high.
LVCMOS / LVTTL interface levels.
Clock select input. When HIGH, selects differential PCLK, nPCLK inputs. When
LOW, selects CLK, nCLK inputs. LVCMOS / LVTTL interface levels.
Non-inverting differential clock input.
Inverting differential clock input.
Non-inverting differential LVPECL clock input.
Inverting differential LVPECL clock input.
No connect.
Positive supply pin.
Differential output pair. HSTL interface levels.
Output supply pins.
Differential output pair. HSTL interface levels.
Differential output pair. HSTL interface levels.
Differential output pair. HSTL interface levels.
2
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-HSTL FANOUT BUFFER
Minimum
©2011 Integrated Device Technology, Inc.
Typical
51
51
4
Maximum
Units
k
k
pF
Ω
Ω