8523BGLF Integrated Device Technology (Idt), 8523BGLF Datasheet - Page 13

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8523BGLF

Manufacturer Part Number
8523BGLF
Description
Clock Driver 2-IN HSTL 20-Pin TSSOP Tube
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 8523BGLF

Package
20TSSOP
Configuration
1 x 2:1
Input Signal Type
CML|HCSL|HSTL|LVDS|LVPECL|SSTL
Maximum Output Frequency
650 MHz
Operating Supply Voltage
3.3 V
ICS8523 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8523.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS8523 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 6. Thermal Resitance
ICS8523CG REVISION E JANUARY 24, 2011
Linear Feet per Minute
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 4 x 32.6mW = 130.4mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
70°C + 0.304W * 66.6°C/W = 90.2°C. This is well below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.465V, with all outputs switching) = 173.3mW + 130.4mW = 303.7mW
MAX
MAX
= V
= 32.6mW/Loaded Output pair
DD_MAX
θ
JA
for 20 Lead TSSOP, Forced Convection
* I
DD_MAX
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 50mA = 173.3mW
* Pd_total + T
θ
JA
A
114.5°C/W
73.2°C/W
by Velocity
0
13
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-HSTL FANOUT BUFFER
66.6°C/W
98.0°C/W
200
JA
must be used. Assuming a moderate air
©2011 Integrated Device Technology, Inc.
88.0°C/W
63.5°C/W
500

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