78Q8430-128CGT/F Maxim Integrated Products, 78Q8430-128CGT/F Datasheet - Page 37

• Manufacturer Part Number: 78Q8430-128CGT/F
• Description: Telecom ICs 10/100MAC+PHY MULTI MEDIA OFFLOAD CNTRLR
• Manufacturer: Maxim Integrated Products

DS_8430_001
STEP 2. Write address and mask byte [1] through byte [4] to the CAM. For each byte the CAM rule
STEP 3. Write address and mask byte [5] to CAM rule 0x3C+N as follows.
STEP 4. Enable the filter. The multicast address filter is enabled by setting the Previous Hit Mask field of the
A Multicast address filter can be simply activated/deactivated by toggling the value of the Previous Hit
Mask field for the byte [0] CAM rule between 0x7F and 0x00 respectively. Multicast filter #0 should not be
deactivated in this way.
6.7.1.5
Any address filter, either multicast or unicast, can be set as either a positive or negative filter. A positive
filter is a filter that passes frames with a source MAC address that matches the filter. A negative filter is a
filter that blocks frames with a source MAC address that matches the filter. By default, all filters are
positive acting. The following procedure is used to change a filter to negative action:
STEP 1. Change the Match Control field for the CAM rule for byte [5] from MD to DROP.
To change a filter back to a positive acting filter, change the same Match Control field back to MD.
Rev. 1.2
1
byte [1] through byte [4] respectively.
2
Logic Action field set to TAX.
1
As an example, the Previous Hit Match fields for filter #1 would be 0x7D, 0x65, 0x61 and 0x4D, for
An exception is byte [4] of the broadcast filter. Multicast filter #3, byte [4] should have the Control
Exception: Multicast filter #3, byte [5] should have the Action field set to SETBC.
It is important that STEP 1 deactivates the filter so that no frames are filtered using a partial filter setting
before all relevant rules are written. STEP 4 reactivates the filter once the new settings are in place.
CAR
RMR
RCR
CAR
RMR
RCR
Reg.
Reg.
CAM rule for byte [0] to 0x7F. This step must be done last to prevent an ingressing frame from
matching a partial set of filter rules. All the rules for a filter must be in place before enabling the filter.
Negative Address Filters
indicated by table 5.7.2 based on the filter number and byte number should be written as follows.
ADDR
Data Match
Data Mask
Previous Hit Match
Previous Hit Mask
Byte Offset
Interrupt
Control Logic Action
Match Control
ADDR
Data Match
Data Mask
Previous Hit Match
Previous Hit Mask
Byte Offset
Interrupt
Control Logic Action
Match Control
Field
Field
byte [1]:
0x64+N
Value of MAC address byte [1] … byte [4]
Value of mask byte [1] . . . byte [4]
Value of the CAM rule used by the previous byte
0x7F
Retain default: 0x00
Retain default: 0
Retain default: NOP
Retain default: MD
0x3C+N
Value of MAC address byte [5]
Value of mask byte [5]
Set to the CAM rule that was used for byte [4] (0x48+N).
0x7F
Retain default: 0x00
Retain default: 0
Set to TAX
Retain default: MD
1
byte [2]:
0x60+N
2
Value to write
Value to write
byte [3]:
0x4C+N
78Q8430 Data Sheet
byte [4]:
0x48+N
1
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