NDS9957 Fairchild Semiconductor, NDS9957 Datasheet

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NDS9957

Manufacturer Part Number
NDS9957
Description
MOSFET 2N-CH 60V 2.6A 8-SOIC
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of NDS9957

Fet Type
2 N-Channel (Dual)
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
160 mOhm @ 2.6A, 10V
Drain To Source Voltage (vdss)
60V
Current - Continuous Drain (id) @ 25° C
2.6A
Vgs(th) (max) @ Id
3V @ 250µA
Gate Charge (qg) @ Vgs
12nC @ 10V
Input Capacitance (ciss) @ Vds
200pF @ 30V
Power - Max
900mW
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
NDS9957TR

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Absolute Maximum Ratings
_______________________________________________________________________________
Symbol
V
V
I
P
T
THERMAL CHARACTERISTICS
R
R
© 1997 Fairchild Semiconductor Corporation
D
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications such
as DC motor control and DC/DC conversion where fast
switching, low in-line power loss, and resistance to transients
are needed.
General Description
J
DSS
GSS
D
NDS9957
Dual N-Channel Enhancement Mode Field Effect Transistor
,T
JA
JC
STG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
Operating and Storage Temperature Range
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
- Pulsed
T
A
= 25°C unless otherwise noted
(Note 1a)
(Note 1)
(Note 1c)
(Note 1a)
(Note 1b)
(Note 1a)
Features
2.6A, 60V. R
High density cell design for extremely low R
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
6
5
8
7
DS(ON)
NDS9957
-55 to 150
= 0.16
± 2.6
± 20
± 10
1.6
0.9
60
78
40
2
1
@ V
GS
= 10V.
4
3
2
1
DS(ON)
February 1996
.
NDS9957.SAM
Units
°C/W
°C/W
W
°C
V
V
A

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NDS9957 Summary of contents

Page 1

... High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package 25°C unless otherwise noted A (Note 1a) (Note 1a) (Note 1b) (Note 1c) (Note 1a) (Note 1) February 1996 = 0. 10V. DS(ON DS(ON NDS9957 60 ± 20 ± 2.6 ± 1.6 1 0.9 -55 to 150 78 40 Units °C °C/W °C/W NDS9957.SAM ...

Page 2

... Gate-Source Charge Gate-Drain Charge gd Conditions 250 µ - 250 µ 125° 2 125° 4 2 125° 2 1.0 MHz V GEN 2 Min Typ Max Units µA 100 nA -100 0.7 1.1 2.2 0.145 0.16 0.25 0.3 0.19 0.25 0.32 0 200 7 2.8 nC 0.8 nC NDS9957.SAM ...

Page 3

... C/W when mounted on a 0.02 in pad of 2oz cpper 135 C/W when mounted on a 0.003 in pad of 2oz cpper. 1a Scale letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. Conditions 2.6 A (Note Min Typ Max Units 1.7 0.9 1.2 is guaranteed NDS9957.SAM A V ...

Page 4

... Figure 6. Gate Threshold Variation with V = 3.0V GS 3.5 4.0 4.5 5 DRAIN CURRENT (A) D and Drain Current 125°C J 25°C -55° DRAIN CURRENT (A) D Current and Temperature 250µ 100 T , JUNCTION TEMPERATURE (°C) J Temperature. 6 125 150 NDS9957.SAM ...

Page 5

... I C iss oss 4 C rss Figure 10. Gate Charge Characteristics. t d(on OUT Figure 12. Switching Waveforms 125°C J 25°C -55°C 0.4 0.6 0 BODY DIODE FORWARD VOLTAGE (V) SD with Current and Temperature 2. GATE CHARGE (nC off t t d(off PULSE WIDTH 1 INVERTED NDS9957.SAM ...

Page 6

... Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. (continued -55° 25°C 1 0.3 125°C 0.1 SINGLE PULSE R 0.03 0. 0.1 0.2 Figure 14. Maximum Safe Operating Area TIME (sec 10V 100 C 25° DRAIN-SOURCE VOLTAGE ( ( See Note 1c JA P(pk ( Duty Cycle NDS9957.SAM ...

Page 7

SO-8 Tape and Reel Data and Package Dimensions SOIC(8lds) Packaging Configuration: Figure 1 SHI P OR STO RE N EAR ECT ROST ECT RO M AGN ETI ...

Page 8

... Dim A max 13" Diameter Option Reel Tape Size Dim A Dim B Option 7.00 0.059 12mm 7" Dia 177.8 1.5 13.00 0.059 12mm 13" Dia 330 1.5 1998 Fairchild Semiconductor Corporation User Direction of Feed Dimensions are in millimeter 1.55 1.60 1.75 10.25 5.50 8.0 +/-0 ...

Page 9

SO-8 Tape and Reel Data and Package Dimensions, continued SOIC-8 (FS PKG Code S1 Scale 1:1 on letter size paper Dimensions shown below are in: inches [millimeters] Part Weight per unit (gram): 0.0774 September 1998, Rev. ...

Page 10

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ CMOS FACT™ FACT Quiet Series™ FAST FASTr™ GTO™ ...

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