CYD18S72V-100BBC Cypress Semiconductor Corp, CYD18S72V-100BBC Datasheet - Page 25

IC,SYNC SRAM,256KX72,CMOS,BGA,484PIN,PLASTIC

CYD18S72V-100BBC

Manufacturer Part Number
CYD18S72V-100BBC
Description
IC,SYNC SRAM,256KX72,CMOS,BGA,484PIN,PLASTIC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYD18S72V-100BBC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Synchronous
Memory Size
18M (256K x 72)
Speed
100MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CYD18S72V-100BBC
Quantity:
359
Part Number:
CYD18S72V-100BBC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document History Page
Document Number : 38-06069 Rev. *K
Document Title: CYD04S72V / CYD09S72V / CYD18S72V FLEx72™ 3.3 V 64 K/128 K/256 K × 72 Synchronous Dual-Port
RAM
Document Number: 38-06069
REV.
*C
*D
*G
*H
*A
*B
*E
*F
*K
*J
**
*I
ECN NO. Issue Date
2898491
3110296
125859
128707
128997
129936
233830
288892
327355
345735
360316
460454
12/14/2010
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
06/17/03
08/01/03
09/18/03
09/30/03
07/01/10
Change
Orig. of
ADMU
WWZ
WWZ
SPN
SPN
SPN
SPN
AEQ
PCX
YDT
YDT
AJU
Description of Change
New Data Sheet
Added -133 speed bin
Updated spec values for I
Added new parameter I
Added bank select read and read to write to read (OE=low) timing diagrams
Updated spec values for t
t
Updated read to write (OE=low) timing diagram
Updated Master Reset values for t
Updated pinout
Updated V
Updated package diagram
Updated t
Removed Preliminary status
Added 4 Mbit and 9 Mbit x72 devices into the data sheet with updated pinout,
pin description table, power table, and timing table
Changed title
Added Preliminary status to reflect the addition of 4 Mbit and 9 Mbit devices
Removed FLEx72-E from the document
Added counter related functions for 4 Mbit and 9 Mbit
Removed standard JTAG description
Updated block diagram
Updated pinout with FTSEL and one more PORTSTD pins per port
Updated tRSF of CYD18S72V value
Change pinout D15 from REV[2,4] to VSS to reflect SC pin removal
Changed pinout K3 from NC to NC[2,5]
Changed pinout K20 from NC to NC[2,5]
Changed pinout D15 from VSS to NC
Changed pinout D8 and M3 from REVL[2,4] to VSS
Changed pinout M20 and W15 from REVR[2,4] to VSS
VREF Pin Definition Updated
Added Pb-Free Part Ordering Informations
Added note for V
Changed notes for PORTSTD to VSS
Changed ICC, ISB1, ISB2 and ISB4 number for CYD09S72V per PE request
Changed CYDxxS72AV to CYDxxS72V (rev. A not implemented)
Removed inactive parts from Ordering Information.
Updated Packaging Information
Updated
Added
SB,
t
SW,
Ordering Code
t
SD,
Ordering
CD2
CORE
t
CD2
value on first page
voltage range
CORE
Information.
Definitions.
CC1
OE,
CC,
t
t
OHZ,
HA,
t
HB,
RS,
t
CH2,
t
t
HW,
RSR,
t
CL2,
t
HD
t
RSF
t
HA,
t
HB,
t
HW,
t
HD,
CYD04S72V
CYD09S72V
CYD18S72V
I
CC,
I
Page 25 of 26
SB5,
t
SA,
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