CY7C1347G-200AXC Cypress Semiconductor Corp, CY7C1347G-200AXC Datasheet - Page 22

• Manufacturer Part Number: CY7C1347G-200AXC
• Description: SRAM (Static RAM)
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1347G-200AXC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 4.5M (128K x 36)
• Speed: 200MHz
• Interface: Parallel
• Voltage - Supply: 3.15 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Density: 4.5Mb
• Access Time (max): 2.8ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 200MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 17b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 4
• Supply Current: 265mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 128K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 428-2115; CY7C1347G-200AXC

Document History Page
Document #: 38-05516 Rev. *H
Revision
Document Title: CY7C1347G 4-Mbit (128 K × 36) Pipelined Sync SRAM
Document Number: 38-05516
*G
*A
*B
*C
*D
*E
*H
*F
**
1078184
2633279 NXR/AESA
2756998
2998771
224364
276690
333625
419256
480124
ECN
Change
Orig. of
RKF
RXU
VKN
VKN
VKN
VBL
SYT
NJY
Submission
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
01/15/09
08/28/09
08/02/10
Date
Description of Change
New datasheet
Changed TQFP package in Ordering Information section to Pb-Free TQFP
Added comment of BG and BZ Pb-Free package availability
Removed 225 MHz and 100 MHz speed grades
Modified Address Expansion balls in the pinouts for 100 TQFP Package as per
JEDEC standards and updated the Pin Definitions accordingly
Modified V
Replaced TBDs for Θ
tance table
Changed the package name for 100 TQFP from A100RA to A101
Removed comment on the availability of BG Pb-Free package
Updated the Ordering Information by shading and unshading MPNs as per
availability
Converted from Preliminary to Final.
Changed address of Cypress Semiconductor Corporation on Page #1 from “3901
North First Street” to “198 Champion Court”
Swapped typo CE
Modified test condition from V
Modified test condition from V
Modified “Input Load” to “Input Leakage Current except ZZ and MODE” in the
Electrical Characteristics Table.
Replaced Package Name column with Package Diagram in the Ordering
Information table.
Replaced Package Diagram of 51-85050 from *A to *B
Replaced Package Diagram of 51-85180 from ** to *A
Updated the Ordering Information.
Added the Maximum Rating for Supply Voltage on V
Updated the Ordering Information table.
Corrected write timing diagram on page 12
Updated Ordering Information and data sheet template.
Included Soft Error Immunity Data
Modified Ordering Information table by including parts that are available and
modified the disclaimer for the Ordering information.
Updated Package Diagram for spec 51-85180.
Template update.
Updated package diagrams to latest revision.
51-85050 – *B to *C
51-85115 – *B to *C
51-85180 – *B to *C
OL,
V
OH
2
test conditions
and CE
JA
and Θ
3
in the Truth Table column heading on Page #6
JC
IH
DDQ
< V
to their respective values on the Thermal Resis-
< V
DD
DD
to V
to V
IH
DDQ
< V
DD.
< V
DDQ
DD
Relative to GND.
CY7C1347G
Page 22 of 23
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