CS8420-DSZR Cirrus Logic Inc, CS8420-DSZR Datasheet - Page 5

• Manufacturer Part Number: CS8420-DSZR
• Description: IC,Digital Audio Sample Rate Converter,SOP,28PIN
• Manufacturer: Cirrus Logic Inc

CS8420
Figure 35.Consumer Input Circuit ............................................................................................................. 80
Figure 36.TTL/CMOS Input Circuit ............................................................................................................ 80
Figure 37.Channel Status Data Buffer Structure ....................................................................................... 81
Figure 38.Channel Status Block Handling When Fso is Not Equal to Fsi ................................................. 82
Figure 39.Flowchart for Reading the E Buffer ........................................................................................... 82
Figure 40.Flowchart for Writing the E Buffer ............................................................................................. 83
Figure 41.PLL Block Diagram ................................................................................................................... 87
Figure 42.Recommended Layout Example ............................................................................................... 88
Figure 43.Jitter Tolerance Template ......................................................................................................... 90
Figure 44.Revision D Jitter Attenuation ..................................................................................................... 90
Figure 45.Revision D1 Jitter Attenuation ................................................................................................... 90
LIST OF TABLES
Table 1. Minimizing Group Delay Through Multiple CS8420s When Locking to RXP/RXN ...................... 28
Table 2. Minimizing Group Delay Through Multiple CS8420s When Locking to ILRCK ........................... 28
Table 3. Non-SRC Delay ........................................................................................................................... 29
Table 4. Summary of all Bits in the Control Register Map ........................................................................ 33
Table 5. Hardware Mode Definitions ......................................................................................................... 55
Table 6. Serial Audio Output Formats Available in Hardware Mode ......................................................... 55
Table 7. Serial Audio Input Formats Available in Hardware Mode ............................................................ 55
Table 8. Hardware Mode 1 Start-Up Options ............................................................................................ 56
Table 9. HW Mode 2A COPY/C and ORIG/U Pin Function ...................................................................... 60
Table 10. HW Mode 2 Serial Audio Port Format Selection ....................................................................... 60
Table 11. Hardware Mode 2 Start-Up Options .......................................................................................... 60
Table 12. Hardware Mode 3 Start-Up Options .......................................................................................... 64
Table 13. Hardware Mode 4 Start-Up Options .......................................................................................... 68
Table 14. Hardware Mode 5 Start-Up Options .......................................................................................... 71
Table 15. HW 6 COPY/C and ORIG Pin Function .................................................................................... 75
Table 16. HW 6 Serial Port Format Selection ........................................................................................... 75
Table 17. Second Line Part Marking ......................................................................................................... 88
Table 18. Locking to RXP/RXN - Fs = 8 to 96 kHz ................................................................................... 89
Table 19. Locking to RXP/RXN - Fs = 32 to 96 kHz* ................................................................................ 89
Table 20. Locking to the ILRCK Input ....................................................................................................... 89
DS245F4
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