CS8420-DSZR Cirrus Logic Inc, CS8420-DSZR Datasheet - Page 36

• Manufacturer Part Number: CS8420-DSZR
• Description: IC,Digital Audio Sample Rate Converter,SOP,28PIN
• Manufacturer: Cirrus Logic Inc

36
10.4
AMLL
TXOFF
AESBP
TXD[1:0]
SPD[1:0]
SRCD
AMLL
7
Data Flow Control (03h)
TXOFF
The Data Flow Control register configures the flow of audio data to/from the following blocks:
Serial Audio Input Port, Serial Audio Output Port, AES3 receiver, AES3 transmitter, and Sample
Rate Converter. In conjunction with the Clock Source Control register, multiple Receiver/Trans-
mitter/Transceiver modes may be selected. The output data should be muted prior to changing
bits in this register to avoid transients.
Auto Mutes the SRC data sink when Receiver lock is lost, zero data is transmitted. The SRC
data sink may be either, or both, the Transmitter and the Serial Audio Output Port.
0 - Disables Auto Mute on loss of lock (default)
1 - Enables Auto Mute on loss of lock
0 - AES3 transmitter output pin drivers normal operation (default)
1 - AES3 transmitter output pin drivers drive to 0 V.
AES3 bypass mode selection
0 - normal operation
1 - Connect the AES3 transmitter driver input directly to the RXP pin, which become a normal
TTL threshold digital input.
00 - SRC output (default)
01 - Serial audio input port
10 - AES3 receiver
11 - Reserved
Serial Audio Output Port Data Source
00 - SRC output (default)
01 - Serial Audio Input Port
10 - AES3 receiver
11 - Reserved
Input Data Source for SRC
0 - Serial Audio Input Port (default)
1 - AES3 Receiver
AES3 Transmitter Output Driver Control
AES3 Transmitter Data Source
6
AESBP
5
TXD1
4
TXD0
3
SPD1
2
SPD0
1
CS8420
DS245F4
SRCD
0