HFBR-57E5APZ Avago Technologies US Inc., HFBR-57E5APZ Datasheet - Page 8

• Manufacturer Part Number: HFBR-57E5APZ
• Description: MM LC SFP FE DMI ROHS
• Manufacturer: Avago Technologies US Inc.

Specifications of HFBR-57E5APZ

• Data Rate: 125MBd
• Wavelength: 1310nm
• Applications: Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Connector Type: LC Duplex
• Mounting Type: SFP
• Optical Fiber Type: TX/RX
• Optical Rise Time: 3/2.2ns
• Optical Fall Time: 3/2.2ns
• Operating Temperature Classification: Industrial
• Peak Wavelength: 1308/1380nm
• Package Type: SFP
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Mounting: Snap Fit To Panel
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 9. Transceiver diagnostics timing characteristics
Notes:
1. Time from rising edge of TXDIS to when the optical output falls below 10% of nominal.
2. Time from falling edge of TXDIS to when the modulated optical output rises above 90% of nominal.
3. Time from Power on or falling edge of TXDIS to when the modulated optical output rises above 90% of nominal.
4. Time from valid optical signal to SD assertion.
5. Time from loss of optical signal to SD de-assertion.
6. Time from two-wire interface assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the optical output falls below 10% of nominal. Measured from
7. Time from two-wire interface de-assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the modulated optical output rises above 90% of
8. Time for two-wire interface assertion of Rx_LOS (A2h, byte 110, bit 1) from loss of optical signal.
9. Time for two-wire interface de-assertion of Rx_LOS (A2h, byte 110, bit 1) from presence of valid optical signal.
10. From power on to data ready bit asserted (A2h, byte 110, bit 0). Data ready indicates analog monitoring circuitry is functional.
11. Time from power on until module is ready for data transmission over the serial bus (reads or writes over A0h and A2h).
12. Time from stop bit to completion of a 1-8 byte write command.
8
Parameter
Hardware TXDIS Assert Time
Hardware TXDIS De-Assert Time
Time to Initialize
Hardware LOS Assert Time
Hardware LOS De-Assert Time
Software TX_DISABLE Assert Time
Software TX_DISABLE De-Assert Time
Software RX_LOS Assert Time
Software RX_LOS De-Assert Time
Analog Parameter Data Ready
Serial Hardware Ready
Write Cycle Time
Serial ID clock Rate
falling clock edge after stop bit of write transaction.
nominal.
Symbol
t_off
t_on
t_init
t_sd_on
t_sd_off
t_off_soft
t_on_soft
t_loss_on_soft
t_loss_off_soft
t_data
t_serial
t_write
f_serial_clock
Min
Max
10
10
300
100
350
100
100
100
100
1000
300
10
400
Unit
Ps
Ps
ms
Ps
Ps
ms
ms
ms
ms
ms
ms
ms
kHz
Notes
Note 1, Figure 8
Note 2, Figure 8
Note 3, Figure 8
Note 4
Note 5
Note 6
Note 7
Note 8
Note 9
Note 10
Note 11
Note 12