UPD78F9502MA-CAC-A NEC, UPD78F9502MA-CAC-A Datasheet - Page 101
UPD78F9502MA-CAC-A
Manufacturer Part Number
UPD78F9502MA-CAC-A
Description
8BIT MCU, 4K FLASH, 128B RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F9502MA-CAC-A.pdf
(229 pages)
Specifications of UPD78F9502MA-CAC-A
Controller Family/series
UPD78F
No. Of I/o's
8
Ram Memory Size
128Byte
Cpu Speed
10MHz
No. Of Timers
2
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
4KB
Oscillator Type
External, Internal
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(2) Interrupt mask flag register 0 (MK0)
(3) External interrupt mode register 0 (INTM0)
Address: FFE4H
Address: FFECH
Symbol
Symbol
INTM0
MK0
The interrupt mask flag is used to enable and disable the corresponding maskable interrupts.
MK0 is set with a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets MK0 to FFH.
This register is used to set the valid edge of INTP0 and INTP1.
INTM0 is set with an 8-bit memory manipulation instruction.
Reset signal generation clears INTM0 to 00H.
Caution Because P21 and P32 have an alternate function as external interrupt inputs, when the
Cautions 1. Be sure to clear bits 0, 1, 6, and 7 to 0.
ES01
ES11
7
0
0
1
1
0
0
0
1
1
MK
7
0
1
1
After reset: FFH
After reset: 00H
output level is changed by specifying the output mode of the port function, an interrupt
request flag is set. Therefore, the interrupt mask flag should be set to 1 before using the
output mode.
ES10
ES00
Enables interrupt servicing.
Disables interrupt servicing.
6
0
0
1
0
1
0
1
0
1
6
Figure 8-4. Format of External Interrupt Mode Register 0 (INTM0)
1
Figure 8-3. Format of Interrupt Mask Flag Register 0 (MK0)
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
Falling edge
Rising edge
Setting prohibited
Both rising and falling edges
ES11
5
5
1
R/W
R/W
ES10
CHAPTER 8 INTERRUPT FUNCTIONS
4
Preliminary User’s Manual U18681EJ1V0UD
TMMKH1
<4>
ES01
3
PMK1
<3>
ES00
Interrupt servicing control
2
INTP1 valid edge selection
INTP0 valid edge selection
PMK0
<2>
1
0
LVIMK
<1>
0
0
1
0
101
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