UPD78F1154GK-GAK-AX NEC, UPD78F1154GK-GAK-AX Datasheet - Page 59

• Manufacturer Part Number: UPD78F1154GK-GAK-AX
• Description: 16BIT MCU, 128K FLASH, 8K RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F1154GK-GAK-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 70
• Ram Memory Size: 8192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 9
• No. Of: RoHS Compliant
• Core Size: 16bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

7.14 Low-Voltage Detector (LVI)
The low-voltage detector (LVI) has the following functions.
• The LVI circuit compares the supply voltage (V
• The low-voltage detector (LVI) can be set to ON by an option byte by default. If it is set to ON to raise the power
• The supply voltage (V
• A reset or an interrupt can be selected to be generated after detection by software.
• Detection levels (16 levels) of supply voltage can be changed by software.
• Operable in STOP mode.
The low-voltage detector is controlled by the following registers.
(1) Low-voltage detection register (LVIM)
(2) Low-voltage detection level select register (LVIS)
(3) Port mode register 12 (PM12)
V
DD
external input pin (EXLVI) with the detection voltage (V
or internal interrupt signal.
supply from the POC detection voltage or lower, the internal reset signal is generated when the supply voltage
(V
supply voltage (V
by software.
Note
This register sets low-voltage detection and the operation mode.
This register selects the low-voltage detection level.
When using the P120/EXLVI/INTP0 pin for external low-voltage detection potential input, set PM120 to 1. At
this time, the output latch of P120 may be 0 or 1.
DD
) < detection voltage (V
These are preliminary values and subject to change.
detection
voltage
selector
Low-
level
Low-voltage detection level
select register (LVIS)
DD
) < detection voltage (V
EXLVI/P120/
DD
) or the input voltage from the external input pin (EXLVI) can be selected to be detected
INTP0
Figure 7-14. Block Diagram of Low-Voltage Detector
LVI
= 2.07 V ±0.2 V
Preliminary Product Information U17892EJ2V0PM
LVI
Reference
voltage
source
= 2.07 V ±0.1 V
Internal bus
DD
Note
) with the detection voltage (V
N-ch
). After that, the internal reset signal is generated when the
+
−
V
DD
EXLVI
= 1.21 V ±0.1 V
Note
).
Low voltage detection
register (LVIM)
Note
), and generates an internal reset
LVI
) or the input voltage from an
78K0R/KF3
Internal reset
signal
INTLVI
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