UPD78F1154GK-GAK-AX NEC, UPD78F1154GK-GAK-AX Datasheet - Page 53

• Manufacturer Part Number: UPD78F1154GK-GAK-AX
• Description: 16BIT MCU, 128K FLASH, 8K RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F1154GK-GAK-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 70
• Ram Memory Size: 8192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 9
• No. Of: RoHS Compliant
• Core Size: 16bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

<Registers of each channel> m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3)
(9) Serial data register mn (SDRmn)
(10) Serial mode register mn (SMRmn)
(11) Serial communication operation setting register mn (SCRmn)
(12) Serial status register mn (SSRmn)
(13) Serial flag clear trigger register mn (SIRmn)
(14) Serial output level register m (SOLm)
This is the transmit/receive data register of channel n. Bits 7 to 0 function as a transmit/receive buffer register,
and bits 15 to 9 are used as a register that sets the division ratio of the operating clock (MCK).
This register is used to set an operation mode of channel n. It is also used to select an operating clock (MCK),
specify whether the serial clock (SCK) may be input or not, set a start trigger, and select an operation mode
(CSI, UART, or IIC), and an interrupt source.
This is a communication operation setting register of channel n. It is used to set a data transmission/reception
mode, transmission/reception timing, whether an error signal is to be masked or not, parity bit, start bit, stop bit,
and data length.
This register indicates the communication status and error occurrence status of channel n. The errors
indicated by this register are a framing error, parity error, and overrun error.
This is a trigger register that is used to clear each error flag of channel n.
This register is used to set inversion of the data output level of each channel.
Preliminary Product Information U17892EJ2V0PM
78K0R/KF3
53