AD9553BCPZ Analog Devices Inc, AD9553BCPZ Datasheet - Page 27

IC INTEGER-N CLCK GEN 32LFCSP

AD9553BCPZ

Manufacturer Part Number
AD9553BCPZ
Description
IC INTEGER-N CLCK GEN 32LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9553BCPZ

Clock Ic Type
PLL Clock Driver
Ic Interface Type
3 Wire, Serial
Frequency
710MHz
No. Of Outputs
2
Supply Current
162mA
Supply Voltage Range
0V To 3.3V
Digital Ic Case Style
LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AD9553BCPZ
Manufacturer:
ADI
Quantity:
154
Generally, the AD9553 is for applications in which f
are the same frequency, so the multiplexers in the REFA and
REFB paths share identical configurations. This, in conjunction
with the crystal frequency (f
tionship between the R
factor for the REFA path).
Note that for pin programmed holdover applications using the
crystal, the crystal frequency must be 25 MHz. Under these
circumstances, Equation 1 simplifies as follows:
CALCULATING DIVIDER VALUES
This section describes the process of calculating the divider
values when given a specific f
of either the REFA or REFB input signal source or the external
crystal resonator). This description is in general terms, but it
includes a specific example for clarity. The example assumes a
frequency control pin setting of A3 to A0 = 1011 (see Table 14)
and Y5 to Y0 = 011100 (see Table 15), yielding the following:
Follow these steps to calculate the divider values.
1.
2.
f
f
Determine the output divide factor (ODF).
Note that the VCO frequency (f
4050 MHz. The ratio, f
ODF. Given the specified value of f
and the range of f
26.04. The ODF must be an integer, which means that ODF
is 22, 23, 24, 25, or 26.
Determine suitable values for P
The ODF is the product of the two output dividers P
P
(see the Output/Input Frequency Relationship section),
which means that there are only three possibilities for ODF
in this example: ODF = 22 (P
= 6, P
ODF values result in the only VCO frequencies that satisfy
the 155.52 MHz requirement for OUT1 (3421.44 MHz for
ODF = 22, 3732.48 MHz for ODF = 24, and 3888 MHz for
ODF = 25). The results appear in Equation 2, Equation 3,
and Equation 4. Note that the second result (Equation 3)
agrees with Table 15 in the Preset Frequencies section).
2
REF
OUT1
1
50
×
P
P
P
(ODF = P0P1). However, P
f
f
REFA
= 125 MHz
0
0
0
f
×
REFA
= 155.52 MHz
= 11, P
= 6, P
= 5, P
XTAL
1
10
= 4), and ODF = 25 (P
6
=
=
1
1
1
= 4 (f
= 5 (f
K
K
= 2 (f
×
×
R
R
R
VCO
VCO
R
VCO
XO
A
A
XO
VCO
A
and R
, the ODF spans a range of 21.54 to
= 3732.48 MHz)
= 3888 MHz)
= 3421.44 MHz)
VCO
XTAL
OUT1
/f
XO
OUT1
), results in the following rela-
dividers (here K is the scale
/f
0
0
0
REF
, indicates the required
= 11, P
= 5, P
must be between 5 and 11
0
VCO
, P
ratio (f
OUT1
1
) spans 3350 MHz to
and f
1
1
= 5). These three
= 2), ODF = 24 (P
(155.52 MHz)
REF
VCO
is the frequency
.
REFA
and f
0
and
Rev. A | Page 27 of 44
REFB
(1)
(2)
(3)
(4)
0
3.
4.
Determine the boundary conditions on N, K, and R.
Because of the architecture of the PLL, FPFD must be an
integer submultiple of the VCO frequency as shown in the
following equation. Note that N is an integer and is the
20-bit value of the N-divider.
This relationship leads to boundary conditions on N
because N must be an integer that satisfies N = f
The limits on FPFD (13.3 kHz to 100 MHz) combined with
the results for f
Note that FPFD also relates to the input frequency, f
the following equation. Here, R is the 14-bit integer divi-
sion factor of the input divider (R
scale factor associated with the optional ×2 multiplier and
divide-by-five functions. Note that K can only be one of
four values: 1/5, 2/5, 1, or 2.
This relationship leads to boundary conditions on R because
R/K = f
be 1/5, 2/5, 1, or 2.
The limits on FPFD (13.3 kHz to 100 MHz) combined with
the given value of f
that for K = 2, the upper bound on R is limited by its 14-bit
range.
Relate N, K, and R to the frequency requirements.
The two FPFD equations in Step 3 show that f
relate as
Note that f
frequencies were determined in Step 2 as 3421.44 MHz,
3732.48 MHz, and 3888 MHz. Based on these values of f
and f
N = 35...257,251 (for f
N = 38...280,637 (for f
N = 39...292,330 (for f
R = 1...1879 (for K = 1/5)
R = 1...3759 (for K = 2/5)
R = 2...9398 (for K = 1)
R = 3...16,384 (for K = 2)
FPFD
FPFD
3421
f
f
VCO
REF
VCO
125
REF
.
44
=
=
=
/FPFD where R must be an integer and K can only
REF
NK
f
=
f
R
VCO
REF
N
is a known quantity (125 MHz) and the VCO
NK
VCO
R
K
R
REF
,
from Step 2 yield
yield the following bounds on R. Note
3732
125
VCO
VCO
VCO
.
48
= 3421.44 MHz)
= 3732.48 MHz)
= 3888 MHz)
=
NK
R
A
or R
,
or
B
), while K is the
3888
125
VCO
AD9553
VCO
and f
=
/FPFD.
REF
NK
R
, per
REF
REF

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