MAX5978ETJ+ Maxim Integrated Products, MAX5978ETJ+ Datasheet - Page 13

• Manufacturer Part Number: MAX5978ETJ+
• Description: Hot Swap & Power Distribution 0-16V HOTSWAP CONTLR W/10BIT CUR VOLT MON
• Manufacturer: Maxim Integrated Products

Specifications of MAX5978ETJ+

• Product: Controllers & Switches
• Supply Voltage (max): 16 V
• Supply Voltage (min): 0 V
• Power Dissipation: 2759 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Supply Current: 2.5 mA
• Package / Case: TQFN-32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX5978 includes a set of registers that are
accessed through the I
isters are read only and some of the registers are read
and write registers that can be updated to configure the
device for a specific operation. See Tables 1a and 1b for
the register maps.
Depending on the configuration of the EN1 and EN2
bits, when V
input reaches its internal threshold, the device turns on
the external n-channel MOSFET for the hot-swap chan-
nel, allowing power to flow to the load. The channel is
enabled depending on the output of a majority function.
Table 1a. Register Address Map (Channel Specific)
max_mon_msb
adc_mon_msb
min_mon_msb
max_mon_lsb
adc_mon_lsb
max_cs_msb
min_mon_lsb
adc_cs_msb
min_cs_msb
max_cs_lsb
ov1thr_msb
ov2thr_msb
REGISTER
adc_cs_lsb
min_cs_lsb
uv1th_msb
uv2th_msb
cbuf_ba_v
ov1thr_lsb
ov2thr_lsb
oithr_msb
cbuf_ba_i
uv1th_lsb
uv2th_lsb
dac_fast
oithr_lsb
NAME
Current, Voltage Monitor, and 4 LED Drivers
IN
Hot-Swap Channel On-Off Control
is above the V
0 to 16V, Hot-Swap Controller with 10-Bit
High 8 bits ([9:2]) of latest current-signal ADC result
Low 2 bits ([1:0]) of latest current-signal ADC result
High 8 bits ([9:2]) of latest voltage-signal ADC result
Low 2 bits ([1:0]) of latest voltage-signal ADC result
High 8 bits ([9:2]) of current-signal minimum value
Low 2 bits ([1:0]) of current-signal minimum value
High 8 bits ([9:2]) of current-signal maximum value
Low 2 bits ([1:0]) of current-signal maximum value
High 8 bits ([9:2]) of voltage-signal minimum value
Low 2 bits ([1:0]) of voltage-signal minimum value
High 8 bits ([9:2]) of voltage-signal maximum value
Low 2 bits ([1:0]) of voltage-signal maximum value
High 8 bits ([9:2]) of undervoltage warning (UV1) threshold
Low 2 bits ([1:0]) of undervoltage warning (UV1) threshold
High 8 bits ([9:2]) of undervoltage critical (UV2) threshold
Low 2 bits ([1:0]) of undervoltage critical (UV2) threshold
High 8 bits ([9:2]) of overvoltage warning (OV1) threshold
Low 2 bits ([1:0]) of overvoltage warning (OV1) threshold
High 8 bits ([9:2]) of overvoltage critical (OV2) threshold
Low 2 bits ([1:0]) of overvoltage critical (OV2) threshold
High 8 bits ([9:2]) of overcurrent warning threshold
Low 2 bits ([1:0]) of overcurrent warning threshold
Fast-comparator threshold DAC setting
Base address for block read of 50-sample voltage-signal data buffer
Base address for block read of 50-sample current-signal data buffer
Detailed Description
2
C interface. Some of the reg-
UVLO
threshold and the ON
DESCRIPTION
EN1, EN2, and ON are the inputs to the majority function
and the channel is enabled when two or more of these
inputs are 1:
Inputs ON and EN2 can be set externally; the initial state
of the EN2 bit in register chxen is set by the state of the
HWEN input when V
connects to an internal precision analog comparators
with a 0.6V threshold. Whenever V
ON bit in register status1[0] is set to 1. Inputs EN1 and
EN2 can be set using the I
a default value of 0. This makes it possible to enable or
disable the hot-swap channel with or without using the
I
2
C interface (see Tables 2, 3a, and 3b).
(Channel enabled) = (EN1 x EN2) + (EN1 x ON) +
IN
rises above V
REGISTER
(EN2 x ON)
NUMBER
0x0A
0x0B
0x0C
0x0D
0x1A
0x1B
0x1C
0x1D
0x00
0x01
0x02
0x03
0x08
0x09
0x0E
0x0F
0x1E
0x1F
0x20
0x21
0x22
0x23
0x2E
0x46
0x47
2
C interface; the EN1 bit has
ON
UVLO
RESET
VALUE
is above 0.6V, the
0xBF
0x00
0x00
0x00
0x00
0xFF
0x03
0x00
0x00
0xFF
0x03
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0x03
0xFF
0x03
0xFF
0x03
—
—
. The ON input
WRITE
READ/
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
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