AS3930-BQFT austriamicrosystems, AS3930-BQFT Datasheet - Page 13

• Manufacturer Part Number: AS3930-BQFT
• Description: IC RF PROGRAM RECEIVER 16-QFN
• Manufacturer: austriamicrosystems

Specifications of AS3930-BQFT

• Rf Type: Read / Write
• Frequency: 110kHz ~ 150kHz
• Features: RSSI Equipped
• Package / Case: 16-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AS3930-BQFTTR

AS3930
Data Sheet - D e t a i l e d D e s c r i p t i o n
8.2.4 Data Receiving
The user can enable this mode allowing the pattern correlation or just on the base of the frequency detection. In this mode the chip can be
retained as a normal OOK receiver. The data is provided on the DAT pin and in case the Manchester decoder is enabled see
recovered clock is present on the CL_DAT. It is possible to put the chip back to listening mode either with a direct command (CLEAR_WAKE
Table
R7<7:5>
8.3 System and Block Specification
8.3.1 Main Logic and SDI
8.3.1.1
Table 6. Register Table
8.3.1.2
Table 7. Default Values of Registers
www.austriamicrosystems.com/AS3930
Register
R10
R12
R13
R11
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R0<5>
R0<4>
R0<3>
R0<2>
R0<1>
R0<0>
R1<7>
R1<6>
R1<5>
R1<4>
R1<3>
12)) or by using the timeout feature. This feature automatically sets the chip back to listening mode after a certain time defined in the
.
Register Table
Register Table Description and Default Values
ABS_HY
S_ABSH
HY_20m
n.a.
EN_MANCH
7
AGC_TLIM
MUX_123
Reserved
Reserved
AGC_UD
ON_OFF
ABS_HY
ATT_ON
T_OFF<1:0>
Name
EN_A
PWD
n.a.
T_OUT<2:0>
AGC_TLIM
HY_POS
n.a.
n.a.
n.a.
6
W_PAT_T<1:0>
Type
W
W
W
W
W
W
W
W
W
W
W
ON_OFF
AGC_UD
Default
Value
n.a.
5
0
0
1
1
1
0
0
0
1
0
0
R_VAL<1:0>
FS_SLC<2:0>
ATT_ON
4
On/Off operation mode. (Duty-cycle defined in the register R4<7:6>)
Revision 1.0
TS2<7:0>
TS1<7:0>
F_WAKE
EN_MANCH
Reserved
Reserved
Reserved (it is not allowed to set this bit to 1)
AGC operating in both direction (up-down)
Reserved
AGC acting only on the first carrier burst
3
Data slicer absolute reference
Manchester decoder enable
Antenna damper enable
Channel enable
T_HBIT<4:0>
Description
Power down
RSSI1<4:0>
RSSI3<4:0>
RSSI2<4:0>
EN_PAT2
Reserved
Reserved
2
GR<3:0>
FS_ENV<2:0>
T_AUTO<2:0>
EN_WPAT
EN_A
1
S_WU1<1:0>
R1<3>
EN_RTC
PWD
, the
0
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(see