TDA9899HN/V2,551 NXP Semiconductors, TDA9899HN/V2,551 Datasheet - Page 44

• Manufacturer Part Number: TDA9899HN/V2,551
• Description: IC IF PROCESSOR MULTISTD 48HVQFN
• Manufacturer: NXP Semiconductors

Specifications of TDA9899HN/V2,551

• Function: IF Processor
• Rf Type: ATV, DVB, FM
• Package / Case: 48-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935282856551; TDA9899HN/V2-S; TDA9899HN/V2-S

NXP Semiconductors
Table 55.
V
f
for L); IF input from 50
B/G is 10 % and for L is 3 %; video signal in accordance with “ITU-T J.63 line 17 and line 330” or “NTC-7 Composite”;
internal Nyquist slope switched on (W7[0] = 0); not dual mode; measurements taken in test circuit of
otherwise specified.
TDA9899_3
Product data sheet
Symbol
V
t
TAGC loop based on VIF AGC (W6[7:6] = 11); TAGC is voltage output; applicable for TV mode: positive modulation and
optional for negative modulation); see
V
V
TOP adjust 2; pin TOP2; IF based TAGC loop mode; see
V
R
R
SC
d
P
th(fast)AGC
acc(set)TOP2
G
sat(l)
i(IF)(RMS)
O
TOP2
I
TOP2
= 5 V; T
acc(set)TOP2
= 32.875 MHz; PC / SC = 13 dB; f
slip(TAGC)
amb
Characteristics
/ T TOP2 setting accuracy
= 25 C; see
Parameter
lower saturation voltage
AGC fast mode threshold
delay time
RMS IF input voltage
TOP2 setting accuracy
variation with temperature
output voltage
TAGC slip gain offset
voltage on pin TOP2 (DC)
input resistance
resistance on pin TOP2
via broadband transformer 1 : 1; video modulation: Vestigial SideBand (VSB); residual carrier for
Table 26
…continued
for input frequencies; B/G standard is used for the specification (f
AF
Table
= 400 Hz); input level V
51;
Figure 12
Rev. 03 — 15 January 2008
Conditions
pin operating as current
output
activated by internal fast
AGC detector; I
setting corresponds to
W9[4:0] = 1 0000
before activating; V
below
at starting point of tuner
AGC takeover;
V
V
no tuner gain reduction
maximum tuner gain
reduction
tuner gain voltage from
0.6 V to 3.5 V
pin open-circuit
adjustment of VIF AGC
based TAGC loop
TAGC
TAGC
R
W10[5:0] = 00 0000
R
W10[5:0] = 01 0000
R
W10[5:0] = 01 1111
W10[5] = 1; external
resistor operation
W10[5] = 0; forced
I
2
C-bus operation
TOP2
TOP2
TOP2
= 3.5 V
= 3.5 V
Multistandard hybrid IF processing including car mobile
th(fast)AGC
and
= 22 k or
= 10 k or
= 0 k
Figure 13
Figure 13
i(IF)
2
C-bus
= 10 mV (RMS) (sync level for B/G; peak white level
i(IF)
[3]
Min
-
6
40
-
-
-
-
-
4.5
0.2
3
-
-
0
100
6
Typ
-
8
60
61
81
96
99
-
0.03
-
-
5
3.5
27
-
-
Figure
PC
TDA9899
© NXP B.V. 2008. All rights reserved.
= 38.375 MHz;
Max
0.3
10
80
-
-
-
-
+6
0.07
V
0.6
8
-
-
22
-
P
49; unless
Unit
V
dB
ms
dB V
dB V
dB V
dB V
dB
dB/K
V
V
dB
V
k
k
k
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