XC56309VL100A Freescale Semiconductor, XC56309VL100A Datasheet - Page 28

• Manufacturer Part Number: XC56309VL100A
• Description: IC DSP 24BIT 100MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of XC56309VL100A

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 196-MAPBGA
• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 102KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Signals/Connections
2.3 Clock
2-4
EXTAL
XTAL
GND
GND
GND
GND
GND
Note:
Ground Name
Signal
Name
A
D
C
H
S
(4)
(2)
(4)
(2)
The subsystem GND signals (GND
package. For the 196-ball MAP-BGA package, all grounds except GND
the package and referenced as GND .
Input
Output
Type
Address Bus Ground
An isolated ground for sections of the address bus I/O drivers. This connection must be tied externally to
all other chip ground connections, except GND
decoupling capacitors.
Data Bus Ground
An isolated ground for sections of the data bus I/O drivers. This connection must be tied externally to all
other chip ground connections, except GND
decoupling capacitors.
Bus Control Ground
An isolated ground for the bus control I/O drivers. This connection must be tied externally to all other
chip ground connections, except GND
decoupling capacitors.
Host Ground
An isolated ground for the HI08 I/O drivers. This connection must be tied externally to all other chip
ground connections, except GND
capacitors.
ESSI, SCI, and Timer Ground
An isolated ground for the ESSI, SCI, and timer I/O drivers. This connection must be tied externally to all
other chip ground connections, except GND
decoupling capacitors.
Input
Chip-driven
State During
Reset
Table 2-3. Grounds (Continued)
Q
DSP56309 User’s Manual, Rev. 1
Table 2-4. Clock Signals
, GND
External Clock/Crystal Input
Interfaces the internal crystal oscillator input to an external crystal or an
external clock.
Crystal Output
Connects the internal crystal oscillator output to an external crystal. If an
external clock is used, leave XTAL unconnected.
A
, GND
P
and GND
P
D
and GND
, GND
P
P
P1
Description
and GND
and GND
C
P
. The user must provide adequate external decoupling
, GND
and GND
P1
. The user must provide adequate external
H
Signal Description
P1
P1
, and GND
. The user must provide adequate external
. The user must provide adequate external
P1
P
. The user must provide adequate external
and GND
S
) are listed for the 144-pin TQFP
P1
are connected together inside
Freescale Semiconductor