C8051F311 Silicon Laboratories Inc, C8051F311 Datasheet - Page 225

IC 8051 MCU 16K FLASH 28MLP

C8051F311

Manufacturer Part Number
C8051F311
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Datasheets

Specifications of C8051F311

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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20.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and
Flash programming functions may be performed. This is possible because C2 communication is typically
performed when the device is in the halt state, where all on-chip peripherals and user software are stalled.
In this halted state, the C2 interface can safely ‘borrow’ the C2CK (/RST) and C2D (P3.0) pins. In most
applications, external resistors are required to isolate C2 interface traffic from the user application. A typi-
cal isolation configuration is shown in Figure 20.1.
The configuration in Figure 20.1 assumes the following:
Additional resistors may be necessary depending on the specific application.
1. The user input (b) cannot change state while the target device is halted.
2. The /RST pin on the target device is used as an input only.
/Reset (a)
Output (c)
Input (b)
Figure 20.1. Typical C2 Pin Sharing
C2 Interface Master
Rev. 1.7
C8051F310/1/2/3/4/5/6/7
C2CK
C2D
C8051Fxxx
225

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