AT90S2333-8AC Atmel, AT90S2333-8AC Datasheet - Page 8

• Manufacturer Part Number: AT90S2333-8AC
• Description: IC MCU 2K FLSH 8MHZ A/D 32TQFP
• Manufacturer: Atmel
• Series: AVR® 90Sr

Specifications of AT90S2333-8AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-TQFP, 32-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

General Purpose Register File
Figure 7 shows the structure of the 32 general purpose working registers in the CPU.
Figure 7. AVR CPU General Purpose Working Registers
All the register operating instructions in the instruction set have direct and single cycle access to all registers. The only
exceptions are the five constant arithmetic and logic instructions SBCI, SUBI, CPI, ANDI, and ORI between a constant and
a register, and the LDI instruction for load immediate constant data. These instructions apply to the second half of the reg-
isters in the register file - R16..R31. The general SBC, SUB, CP, AND, and OR, and all other operations between two
registers or on a single register apply to the entire register file.
As shown in Figure 7, each register is also assigned a data memory address, mapping them directly into the first 32 loca-
tions of the user Data Space. Although not being physically implemented as SRAM locations, this memory organization
provides great flexibility in access of the registers, as the X, Y and Z registers can be set to index any register in the file.
X-register, Y-register, and Z-register
The registers R26..R31 have some added functions to their general purpose usage. These registers are address pointers
for indirect addressing of the Data Space. The three indirect address registers X, Y and Z are defined as:
Figure 8. X, Y and Z Registers
In the different addressing modes, these address registers have functions as fixed displacement, automatic increment and
decrement (see the descriptions for the different instructions).
8
X - register
Y - register
Z - register
Registers
Purpose
Working
General
AT90S/LS2333 and AT90S/LS4433
15
7
15
7
15
7
7
R27 ($1B)
R29 ($1D)
R31 ($1F)
R13
R14
R15
R16
R17
R26
R27
R28
R29
R30
R31
R0
R1
R2
…
…
0
0
0
0
Addr.
$0D
$1C
$1D
$00
$01
$02
$0E
$0F
$10
$11
$1A
$1B
$1E
$1F
7
7
7
X-register high byte
Y-register high byte
Z-register high byte
X-register low byte
Y-register low byte
Z-register low byte
R26 ($1A)
R28 ($1C)
R30 ($1E)
0
0
0
0
0
0