DS80C390-QCR Maxim Integrated Products, DS80C390-QCR Datasheet - Page 31

• Manufacturer Part Number: DS80C390-QCR
• Description: IC MPU CAN DUAL HS 68-PLCC
• Manufacturer: Maxim Integrated Products
• Series: 80Cr

Specifications of DS80C390-QCR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3.85 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-LCC, 68-PLCC
• Processor Series: DS80C390
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Size: 4 KB
• Data Ram Size: 4 KB
• Interface Type: CAN, IrDA
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 3.85 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Table 1. SFR Locations
REGISTER
C0RMS0
C0RMS1
SADDR0
SADDR1
SADEN0
SADEN1
C0TMA0
C0TMA1
C0M10C
C0M11C
C0M12C
C0M13C
CKCON
SCON0
C0M1C
C0M2C
C0M3C
C0M4C
C0M5C
C0M6C
C0M7C
C0M8C
C0M9C
P4CNT
P5CNT
SBUF0
PCON
TMOD
ACON
TCON
DPH1
DPX1
C0RE
DPL1
C0TE
EXIF
C0IR
DPH
DPS
DPX
ESP
C0C
DPL
TH0
TH1
C0S
TL0
TL1
P4
SP
P1
AP
P2
P5
P3
IE
IP
SM0/FE_0
INT5/P1.7 INT4/P1.6 INT3/P1.5 INT2/P1.4 TXD1/P1.3 RXD1/P1.2 T2EX/P1.1
SMOD_0
CAN1BA
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
INTIN7
GATE
ERIE
BIT7
WD1
P4.7
P2.7
P5.7
P3.7
BSS
TF1
ID1
IE5
EA
—
—
—
—
EC96/128
CAN0BA
SMOD0
SBCAN
SM1_0
INTIN6
WD0
STIE
BIT6
P4.6
P2.6
P5.6
P3.6
TR1
ES1
PS1
ID0
C/T
ETI
ETI
ETI
ETI
ETI
ETI
ETI
ETI
ETI
ETI
ETI
IE4
ETI
ETI
—
—
P4CNT.5
SP1EC
SM2_0
INTIN5
OFDF
WKS
BIT5
P4.5
T2M
P2.5
P5.5
PDE
TSL
ET2
PT2
TF0
ERI
ERI
ERI
ERI
ERI
ERI
ERI
ERI
ERI
ERI
ERI
ERI
ERI
IE3
M1
T1
—
—
P4CNT.4
SIESTA
REN_0
C1_I/O
INTIN4
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
OFDE
BIT4
P4.4
T1M
P2.4
P5.4
RXS
TR0
ES0
PS0
IE2
M0
T0
—
—
—
31 of 53
P4CNT.3
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
EXTRQ
C0_I/O
INTIN3
TB8_0
GATE
CKRY
CRST
BIT3
INT1
P4.3
P2.3
P5.3
GF1
T0M
TXS
ET1
PT1
IE1
—
—
—
P4CNT.2
P5CNT.2
AUTOB
INTIN2
RGMD
RB8_0
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
BIT2
MD2
INT0
P4.2
P2.2
P5.2
GF0
ER2
EX1
PX1
IT1
C/T
SA
—
—
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
ROW/TIH
P4CNT.1
P5CNT.1
INTIN1
ESP.1
ERCS
STOP
RGSL
TXD0
BIT1
P4.1
MD1
TI_0
AM1
P2.1
P5.1
ER1
ET0
PT0
IE0
M1
—
P4CNT.0
P5CNT.0
T2/P1.0
SWINT
INTIN0
ESP.0
DTUP
DTUP
DTUP
DTUP
DTUP
DTUP
DTUP
DTUP
DTUP
DTUP
DTUP
DTUP
DTUP
RXD0
BIT0
IDLE
P4.0
MD0
BGS
RI_0
AM0
P2.0
P5.0
ER0
SEL
EX0
PX0
IT0
M0
ADDRESS
8Ch
8Dh
9Ch
9Dh
AAh
ABh
ACh
ADh
AEh
AFh
BAh
BBh
BCh
BDh
8Ah
8Bh
8Eh
98h
9Bh
9Eh
9Fh
A0h
A1h
A2h
A3h
A4h
A5h
A6h
A7h
A8h
A9h
B0h
B3h
B4h
B5h
B6h
B7h
B8h
B9h
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
90h
91h
92h
93h
95h
96h
97h
99h