DS80C390-QCR Maxim Integrated Products, DS80C390-QCR Datasheet - Page 29

IC MPU CAN DUAL HS 68-PLCC

DS80C390-QCR

Manufacturer Part Number
DS80C390-QCR
Description
IC MPU CAN DUAL HS 68-PLCC
Manufacturer
Maxim Integrated Products
Series
80Cr
Datasheet

Specifications of DS80C390-QCR

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SIO, UART/USART
Peripherals
Power-Fail Reset, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3.85 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-LCC, 68-PLCC
Processor Series
DS80C390
Core
8051
Data Bus Width
8 bit
Program Memory Size
4 KB
Data Ram Size
4 KB
Interface Type
CAN, IrDA
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
3.85 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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FEATURES
DETAILED DESCRIPTION
The DS80C390 features two full-function controller area network (CAN) 2.0B controllers. Status and control
registers are distributed between SFRs and 512 bytes of internal MOVX memory for maximum flexibility. In addition
to standard 11-bit or 29-extended message identifiers, the device supports two separate 8-bit media masks and
media arbitration fields to support the use of higher-level CAN protocols such as DeviceNet and SDS.
All of the standard 8051 resources such as three timer/counters, serial port, and four 8-bit I/O ports (plus two 8-bit
ports dedicated to memory interfacing) are included in the DS80C390. In addition it includes a second hardware
serial port, seven additional interrupts, programmable watchdog timer, brownout monitor, power-fail reset, and a
programmable output clock that supports an IrDA interface. The device provides dual data pointers with
increment/decrement features to speed block data memory moves. It also can adjust the speed of MOVX data
memory access from 2 to 12 machine cycles for flexibility in addressing external memory and peripherals.
The device incorporates a 4kB SRAM, which can be configured as various combinations of MOVX memory,
program memory, and optional stack memory. A 22-bit program counter supports access to a maximum of 4MB of
external program memory and 4MB of external data memory. A 10-bit stack pointer addresses up to 1kB of MOVX
memory for increased code efficiency.
A new power-management mode (PMM) is useful for portable or power-conscious applications. This feature allows
software to switch from the standard machine cycle rate of 4 clocks per cycle to 1024 clocks per cycle. For
example, at 12MHz standard operation has a machine cycle rate of 3MHz. In PMM at the same external clock
speed, software can select 11.7kHz machine cycle rate. There is a corresponding reduction in power consumption
when the processor runs slower.
The EMI reduction feature allows software to select a reduced electromagnetic interference (EMI) mode by
disabling the ALE signal when it is unneeded. The device also incorporates active current control on the address
and data buses, reducing EMI by minimizing transients when interfacing to external circuitry.
80C32 COMPATIBILITY
The DS80C390 is a CMOS 80C32-compatible microcontroller designed for high performance. Every effort has
been made to keep the core device familiar to 80C32 users while adding many new features.
DeviceNet is a trademark of Open DeviceNet Vendor Association, Inc.
80C52 Compatible
8051-Instruction-Set Compatible
Four 8-Bit I/O Ports
Three 16-Bit Timer/Counters
256 Bytes Scratchpad RAM
High-Speed Architecture
4 Clocks/Machine Cycle (8051 = 12)
Runs DC to 40MHz Clock Rates
Frequency Multiplier Reduces Electromagnetic
Single-Cycle Instruction in 100ns
16/32-Bit Math Coprocessor
4kB Internal SRAM Usable as
Program/Data/Stack Memory
Enhanced Memory Architecture
Addresses Up to 4MB External
Defaults to True 8051-Memory Compatibility
User-Enabled 22-Bit Program/Data Counter
16-Bit/22-Bit Paged/22-Bit Contiguous Modes
User-Selectable Multiplexed/Nonmultiplexed
Optional 10-Bit Stack Pointer
Interference (EMI)
Memory Interface
29 of 53
Two Full-Function CAN 2.0B Controllers
15 Message Centers Per Controller
Standard 11-Bit or Extended 29-Bit Identification
Supports DeviceNet™, SDS, and Higher Layer
Disables Transmitter During Autobaud
SIESTA Low-Power Mode
Two Full-Duplex Hardware Serial Ports
Programmable IrDA Clock
High-Integration Controller Includes:
Power-Fail Reset
Early-Warning Power-Fail Interrupt
Programmable Watchdog Timer
Oscillator-Fail Detection
16 Interrupt Sources with Six External
Available in 64-Pin LQFP and 68-Pin PLCC
Modes
CAN Protocols

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