MC9S12XA256CAL Freescale Semiconductor, MC9S12XA256CAL Datasheet - Page 150

IC MCU 256K FLASH 112-LQFP

MC9S12XA256CAL

Manufacturer Part Number
MC9S12XA256CAL
Description
IC MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12XA256CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
80MHz
No. Of Timers
1
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XA
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 16 Channel)
Package
112LQFP
Family Name
HCS12
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
4.3.2.15
The data port associated with the ATD is input-only. The port pins are shared with the analog A/D inputs
AN7-0.
Read: Anytime
Write: Anytime, no effect
The A/D input channels may be used for general-purpose digital input.
150
Function
PTAD[7:8]
Reset
Field
Pin
7:0
W
R
PTAD7
AN 7
Port Data Register 1 (PORTAD1)
1
7
A/D Channel x (ANx) Digital Input Bits — If the digital input buffer on the ANx pin is enabled (IENx=1) or
channel x is enabled as external trigger (ETRIGE = 1, ETRIGCH[3-0] = x, ETRIGSEL = 0) read returns the
logic level on ANx pin (signal potentials not meeting V
If the digital input buffers are disabled (IENx = 0) and channel x is not enabled as external trigger, read returns
a “1”.
Reset sets all PORTAD1 bits to “1”.
= Unimplemented or Reserved
PTAD6
AN6
1
6
Figure 4-17. Port Data Register 1 (PORTAD1)
Table 4-26. PORTAD1 Field Descriptions
PTAD5
MC9S12XDP512 Data Sheet, Rev. 2.21
AN5
1
5
PTAD4
AN4
1
4
Description
IL
or V
PTAD3
AN3
1
3
IH
specifications will have an indeterminate value)).
PTAD2
AN2
1
2
Freescale Semiconductor
PTAD1
AN1
1
1
PTAD0
AN0
1
0

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