EP9312-CBZ Cirrus Logic Inc, EP9312-CBZ Datasheet - Page 560

• Manufacturer Part Number: EP9312-CBZ
• Description: IC ARM9 SOC UNIVERSAL 352PBGA
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9312-CBZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 352-BGA
• Controller Family/series: (ARM9)
• No. Of I/o's: 16
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 4
• No. Of Pwm Channels: 2
• Digital Ic Case Style: BGA
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1258

15
15-2
UART2
EP93xx User’s Guide
15.2.1.1 IrDA SIR Transmit Encoder
15.2.1.2 IrDA SIR Receive Decoder
The SIR transmit encoder modulates the Non Return-to-Zero (NRZ) transmit bit stream
output from the UART. The IrDA SIR physical layer specifies use of a Return To Zero,
Inverted (RZI) modulation scheme which represents logic 0 as an infrared light pulse. The
modulated output pulse stream is transmitted to an external output driver and infrared Light
Emitting Diode (LED).
In normal mode, the transmitted pulse width is specified as three times the period of the
internal x16 clock (Baud16), that is, 3/16 of a bit period.
In low-power mode, the transmit pulse width is specified as 3/16 of a 115.2 Kbps bit period.
This is implemented as three times the period of a nominal 1.8432 MHz clock (IrLPBaud16)
derived by dividing down the UARTCLK clock. The frequency of IrLPBaud16 is set up by
writing the appropriate divisor value to UARTILPR. The active low encoder output is normally
LOW for the marking state (no light pulse). The encoder outputs a high pulse to generate a
infrared light pulse representing a logic “0” or spacing state.
The SIR receive decoder demodulates the return-to-zero bit stream from the infrared detector
and outputs the received NRZ serial bit stream to the UART received data input. The decoder
input is normally HIGH (marking state) in the idle state (the transmit encoder output has the
opposite polarity to the decoder input).
Figure 15-1. IrDA SIR Encoder/decoder Block Diagram
Copyright 2007 Cirrus Logic
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