ATMEGA644P-A15MZ Atmel, ATMEGA644P-A15MZ Datasheet - Page 235

• Manufacturer Part Number: ATMEGA644P-A15MZ
• Description: MCU AVR 64KB FLASH 16MHZ 44QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA644P-A15MZ

• Package / Case: 44-VQFN Exposed Pad
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 32
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: I²C, SPI, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.9
19.9.1
7674F–AVR–09/09
Register Description
TWBR – TWI Bit Rate Register
• Two or more masters are accessing different slaves. In this case, arbitration will occur in the
This is summarized in
Figure 19-21. Possible Status Codes Caused by Arbitration
• Bits 7:0 – TWI Bit Rate Register
TWBR selects the division factor for the bit rate generator. The bit rate generator is a frequency
divider which generates the SCL clock frequency in the Master modes. See
Unit” on page 216
Bit
(0xB8)
Read/Write
Initial Value
SLA bits. Masters trying to output a one on SDA while another Master outputs a zero will lose
the arbitration. Masters losing arbitration in SLA will switch to Slave mode to check if they are
being addressed by the winning Master. If addressed, they will switch to SR or ST mode,
depending on the value of the READ/WRITE bit. If they are not being addressed, they will
switch to not addressed Slave mode or wait until the bus is free and transmit a new START
condition, depending on application software action.
START
TWBR7
R/W
7
0
for calculating bit rates.
Address / General Call
Figure
received
Direction
Own
TWBR6
Yes
R/W
Arbitration lost in SLA
6
0
SLA
19-21. Possible status values are given in circles.
Write
Read
TWBR5
No
R/W
5
0
TWBR4
R/W
4
0
68/78
38
B0
Arbitration lost in Data
ATmega164P/324P/644P
TWBR3
TWI bus will be released and not addressed slave mode will be entered
A START condition will be transmitted when the bus becomes free
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Last data byte will be transmitted and NOT ACK should be received
Data byte will be transmitted and ACK should be received
R/W
3
0
Data
TWBR2
R/W
2
0
TWBR1
R/W
1
0
“Bit Rate Generator
TWBR0
R/W
0
0
STOP
TWBR
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