PIC18F452-E/PT Microchip Technology, PIC18F452-E/PT Datasheet - Page 238

IC MCU CMOS 40MHZ 16K FLSH44TQFP

PIC18F452-E/PT

Manufacturer Part Number
PIC18F452-E/PT
Description
IC MCU CMOS 40MHZ 16K FLSH44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F452-E/PT

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Package
44TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
I2C/SPI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F452-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Company:
Part Number:
PIC18F452-E/PT
Quantity:
52
PIC18FXX2
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39564C-page 236
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register 'f'
operation
Move f to f
[ label ]
0
0
(f
None
The contents of source register 'f
are moved to destination register
'f
anywhere in the 4096 byte data
space (000h to FFFh), and location
of destination 'f
where from 000h to FFFh.
Either source or destination can be
W (a useful special situation).
MOVFF is particularly useful for
transferring a data memory location
to a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use
the PCL, TOSU, TOSH or TOSL as
the destination register.
Note:
2
2 (3)
MOVFF
d
Read
s
(src)
read
'. Location of source 'f
)
1100
1111
No
Q2
=
=
=
=
f
f
s
d
f
d
0x33
0x11
0x33,
0x33
4095
4095
The MOVFF instruction
should not be used to mod-
ify interrupt settings while
any interrupt is enabled.
See Section 8.0 for more
information.
REG1, REG2
MOVFF f
ffff
ffff
operation
Process
Data
No
Q3
d
' can also be any-
ffff
ffff
s
,f
d
register 'f'
s
operation
' can be
(dest)
Write
No
Q4
fff
fff
f
f
s
s
d
'
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Read literal
Move literal to low nibble in BSR
[ label ]
0
k
None
The 8-bit literal 'k' is loaded into
the Bank Select Register (BSR).
1
1
MOVLB
0000
Q2
'k'
=
=
k
© 2006 Microchip Technology Inc.
BSR
255
0x02
0x05
5
MOVLB k
0001
Process
Data
Q3
kkkk
literal 'k' to
Write
BSR
Q4
kkkk

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