PIC18F452-E/PT Microchip Technology, PIC18F452-E/PT Datasheet - Page 184

• Manufacturer Part Number: PIC18F452-E/PT
• Description: IC MCU CMOS 40MHZ 16K FLSH44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-E/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 34
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 34
• Interface Type: I2C/SPI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18FXX2
REGISTER 17-2:
DS39564C-page 182
bit 7
bit 6
bit 5-4
bit 3-0
ADFM: A/D Result Format Select bit
1 = Right justified. Six (6) Most Significant bits of ADRESH are read as ’0’.
0 = Left justified. Six (6) Least Significant bits of ADRESL are read as ’0’.
ADCS2: A/D Conversion Clock Select bit (ADCON1 bits in bold)
Unimplemented: Read as '0'
PCFG3:PCFG0: A/D Port Configuration Control bits
Legend:
R = Readable bit
- n = Value at POR
bit 7
A = Analog input
C/R = # of analog input channels / # of A/D voltage references
<ADCS2>
Note:
ADCON1
PCFG
<3:0>
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
ADFM
R/W-0
ADCON1 REGISTER
0
0
0
0
1
1
1
1
AN7
On any device RESET, the port pins that are multiplexed with analog functions (ANx) are
forced to be an analog input.
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
<ADCS1:ADCS0>
ADCS2
R/W-0
ADCON0
AN6
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
D = Digital I/O
00
01
10
11
00
01
10
11
AN5
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
W = Writable bit
’1’ = Bit is set
U-0
—
AN4
D
D
D
D
D
D
F
F
F
F
F
F
F
F
A
A
A
A
A
A
A
A
A
OSC
OSC
OSC
RC
OSC
OSC
OSC
RC
(clock derived from the internal A/D RC oscillator)
(clock derived from the internal A/D RC oscillator)
/2
/8
/32
/4
/16
/64
V
V
V
V
V
V
V
V
V
AN3
REF
REF
REF
REF
REF
REF
REF
REF
REF
A
A
A
D
A
D
U-0
—
+
+
+
+
+
+
+
+
+
V
V
V
V
V
AN2
REF
REF
REF
REF
REF
D
D
D
D
A
A
A
A
A
A
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
-
-
-
-
-
PCFG3
R/W-0
Clock Conversion
AN1
D
D
D
A
A
A
A
A
A
A
A
A
A
A
A
AN0
PCFG2
R/W-0
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
© 2006 Microchip Technology Inc.
V
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
AN3
V
V
V
V
V
REF
—
DD
DD
DD
DD
DD
x = Bit is unknown
+
PCFG1
R/W-0
V
AN2
AN2
AN2
AN2
AN2
V
V
V
V
V
V
V
V
V
REF
—
SS
SS
SS
SS
SS
SS
SS
SS
SS
-
PCFG0
R/W-0
C / R
8 / 0
7 / 1
5 / 0
4 / 1
3 / 0
2 / 1
0 / 0
6 / 2
6 / 0
5 / 1
4 / 2
3 / 2
2 / 2
1 / 0
1 / 2
bit 0