PIC18F452-E/P Microchip Technology, PIC18F452-E/P Datasheet - Page 6

• Manufacturer Part Number: PIC18F452-E/P
• Description: IC MCU CMOS 40MHZ 16K FLSH 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-E/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP/SPI/I2C/PSP/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18FXX2/XX8
2.6
The SCLK pin is used as a clock input pin and the
SDATA pin is used for entering command bits and data
input/output during serial operation. Commands and
data are transmitted on the rising edge of SCLK,
latched on the falling edge of SCLK, and are Least
Significant bit (LSb) first.
2.6.1
All instructions are 20 bits, consisting of a leading 4-bit
command followed by a 16-bit operand, which depends
on the type of command being executed. To input a
command, SCLK is cycled four times. The commands
needed for programming and verification are shown in
Table 2-3.
Depending on the 4-bit command, the 16-bit operand
represents 16 bits of input data or 8 bits of input data
and 8 bits of output data.
Throughout this specification, commands and data are
presented as illustrated in Figure 2-4. The 4-bit com-
mand is shown MSb first. The command operand, or
“Data Payload”, is shown <MSB><LSB>. Figure 2-7
demonstrates how to serially present a 20-bit
command/operand to the device.
2.6.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to setup
registers as appropriate for use with other commands.
FIGURE 2-7:
DS39576C-page 6
SCLK
SDATA
Serial Program/Verify Operation
4-BIT COMMANDS
CORE INSTRUCTION
P3
4-bit Command
1
P2
1
2
P4
0
TABLE WRITE, POST INCREMENT TIMING (1101)
3
1
4
1
P2A
P5
P2B
1
0
2
0
0
3
0
4
0
5
0
SDATA = Input
6
0
16-bit Data Payload
4
7
1
8
0
TABLE 2-3:
TABLE 2-4:
Core Instruction
(Shift in16-bit instruction)
Shift out TABLAT register
Table Read
Table Read, post-increment
Table Read, post-decrement
Table Read, pre-increment
Table Write
Table Write, post-increment by 2
Table Write, post-decrement by 2
Table Write, start programming
9
Command
0
10
1101
4-Bit
0
C
11
1
12
1
Description
13
Payload
1
3C 40
Data
14
COMMANDS FOR
PROGRAMMING
SAMPLE COMMAND
SEQUENCE
1
3
15
0
 2010 Microchip Technology Inc.
16
Table Write,
post-increment by 2
0
P5A
Core Instruction
Fetch Next 4-bit Command
1
n
2
n
3
n
Command
4
4-Bit
n
0000
0010
1000
1001
1010
1011
1100
1101
1110
1111