PIC18F452-E/P Microchip Technology, PIC18F452-E/P Datasheet - Page 22

• Manufacturer Part Number: PIC18F452-E/P
• Description: IC MCU CMOS 40MHZ 16K FLSH 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F452-E/P

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 40-DIP (0.600", 15.24mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP/SPI/I2C/PSP/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ACICE0206 - ADAPTER MPLABICE 40P 600 MIL
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18FXX2/XX8
4.3
A configuration address may be read and output on
SDATA via the 4-bit command, ‘1001’. Configuration
data is read and written in a bytewise fashion, so it is
not necessary to merge two bytes into a word prior to a
compare. The result may then be immediately
compared to the appropriate configuration data in the
programmer’s memory for verification. Refer to
Section 4.1 for implementation details of reading
configuration data.
4.4
Data EEPROM is accessed one byte at a time via an
Address Pointer, EEADR, and a data latch, EEDATA.
Data EEPROM is read by loading EEADR with the
desired memory location and initiating a memory read
by appropriately configuring the EECON1 register. The
data will be loaded into EEDATA, where it may be seri-
ally output on SDATA via the 4-bit command, ‘0010’
(shift out data holding register). A delay of P6 must be
introduced after the falling edge of the 8th SCLK of the
operand to allow SDATA to transition from an input to
an output. During this time, SCLK must be held low
(see Figure 4-4).
The command sequence to read a single byte of data
is shown in Figure 4-2.
TABLE 4-2:
DS39576C-page 22
Step 1: Direct access to data EEPROM.
Step 2: Set the data EEPROM Address Pointer.
Step 3: Initiate a memory read.
Step 4: Load data into the serial data holding register.
Note 1: The <LSB> is undefined. The <MSB> is the data.
Command
0000
0000
0000
0000
0000
0000
0000
0000
0000
0010
4-Bit
Verify Configuration Bits
Read Data EEPROM Memory
9E A6
9C A6
0E <Addr>
6E A9
OE <AddrH>
6E AA
80 A6
50 A8
6E F5
<LSB><MSB>
READ DATA EEPROM MEMORY
Data Payload
BCF EECON1, EEPGD
BCF EECON1, CFGS
MOVLW <Addr>
MOVWF EEADR
MOVLW <AddrH>
MOVWF EEADRH
BSF EECON1, RD
MOVF EEDATA, W, 0
MOVWF TABLAT
Shift Out Data
(1)
FIGURE 4-3:
Core Instruction
No
Move to TABLAT
READ DATA EEPROM
FLOW
Shift Out Data
 2010 Microchip Technology Inc.
Address
Done?
Read
Byte
Start
Done
Set
Yes