PIC16LC72A-04I/SO Microchip Technology, PIC16LC72A-04I/SO Datasheet - Page 60

• Manufacturer Part Number: PIC16LC72A-04I/SO
• Description: IC MCU OTP 2KX14 A/D PWM 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC72A-04I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PIC16C62B/72A
10.8
When a POR reset occurs, the PWRT delay starts (if
enabled). When PWRT ends, the OST counts 1024
oscillator cycles (LP, XT, HS modes only). When OST
completes, the device comes out of reset. The total
time-out will vary based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
If MCLR is kept low long enough, the time-outs will
expire. Bringing MCLR high will begin execution imme-
diately. This is useful for testing purposes or to synchro-
nize more than one PIC16CXXX device operating in
parallel.
Status Register
PCON Register
TABLE 10-3
TABLE 10-4
TABLE 10-5
DS35008B-page 60
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt wake-up from SLEEP
Legend: u = unchanged, x = unknown, - = unimplemented bit read as '0'.
Note 1:
Oscillator Configuration
POR
IRP
0
0
0
1
1
1
1
1
XT, HS, LP
Time-out Sequence
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
BOR
RP1
RC
x
x
x
0
1
1
1
1
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS AND THEIR SIGNIFICANCE
RESET CONDITION FOR SPECIAL REGISTERS
TO
1
0
x
1
0
0
u
1
Condition
RP0
PD
1
x
0
1
1
0
u
0
72 ms + 1024T
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
TO
PWRTE = 0
72 ms
PD
Power-up
OSC
Preliminary
Z
PWRTE = 1
PC + 1
1024T
Program
Counter
PC + 1
000h
000h
000h
000h
000h
—
OSC
POR
Table 10-5 shows the reset conditions for the STATUS,
PCON and PC registers, while Table 10-6 shows the
reset conditions for all the registers.
10.9
The BOR bit is unknown on Power-on Reset. If the
Brown-out Reset circuit is used, the BOR bit must be
set by the user and checked on subsequent resets to
see if it was cleared, indicating a Brown-out has
occurred.
POR (Power-on Reset Status bit) is cleared on a
Power-on Reset and unaffected otherwise. The user
DC
(1)
Power Control/Status Register
(PCON)
0001 1xxx
000u uuuu
0001 0uuu
0000 1uuu
uuu0 0uuu
0001 1uuu
uuu1 0uuu
72 ms + 1024T
BOR
Register
STATUS
C
Brown-out
72 ms
OSC
1999 Microchip Technology Inc.
---- --0x
---- --uu
---- --uu
---- --uu
---- --uu
---- --u0
---- --uu
Register
Wake-up from
PCON
1024T
SLEEP
—
OSC