PIC16LC72A-04I/SO Microchip Technology, PIC16LC72A-04I/SO Datasheet - Page 17

• Manufacturer Part Number: PIC16LC72A-04I/SO
• Description: IC MCU OTP 2KX14 A/D PWM 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC72A-04I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.3
The program counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 13 bits
wide. The low byte is called the PCL register and is
readable and writable. The high byte is called the PCH
register. This register contains the PC<12:8> bits and
is not directly accessible. All updates to the PCH regis-
ter go through the PCLATH register.
2.3.1
The stack allows any combination of up to 8 program
calls and interrupts to occur. The stack contains the
return address from this branch in program execution.
Mid-range devices have an 8 level deep hardware
stack. The stack space is not part of either program or
data space and the stack pointer is not accessible. The
PC is PUSHed onto the stack when a CALL instruction
is executed or an interrupt causes a branch. The stack
is POPed in the event of a RETURN, RETLW or a RET-
FIE instruction execution. PCLATH is not modified
when the stack is PUSHed or POPed.
After the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
1999 Microchip Technology Inc.
PCL and PCLATH
STACK
Preliminary
2.4
The CALL and GOTO instructions provide 11 bits of
address to allow branching within any 2K program
memory page. When doing a CALL or GOTO instruction,
the upper bit of the address is provided by
PCLATH<3>. The user must ensure that the page
select bit is programmed to address the proper pro-
gram memory page. If a return from a CALL instruction
(or interrupt) is executed, the entire 13-bit PC is popped
from the stack. Therefore, manipulation of the
PCLATH<3> bit is not required for the return instruc-
tions.
Program Memory Paging
PIC16C62B/72A
DS35008B-page 17